tmp_arm_loadstore_p0_u1_w0.cc Source File

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tmp_arm_loadstore_p0_u1_w0.cc
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1 
2 /* AUTOMATICALLY GENERATED! Do not edit. */
3 
4 #include <stdio.h>
5 #include <stdlib.h>
6 #include "cpu.h"
7 #include "machine.h"
8 #include "memory.h"
9 #include "misc.h"
10 #define DYNTRANS_PC_TO_POINTERS arm_pc_to_pointers
12 #define reg(x) (*((uint32_t *)(x)))
13 extern void arm_instr_nop(struct cpu *, struct arm_instr_call *);
14 extern void arm_instr_invalid(struct cpu *, struct arm_instr_call *);
15 extern void arm_pc_to_pointers(struct cpu *);
16 #define A__NAME__general arm_instr_store_w0_word_u1_p0_imm__general
17 #define A__NAME arm_instr_store_w0_word_u1_p0_imm
18 #define A__NAME__eq arm_instr_store_w0_word_u1_p0_imm__eq
19 #define A__NAME__ne arm_instr_store_w0_word_u1_p0_imm__ne
20 #define A__NAME__cs arm_instr_store_w0_word_u1_p0_imm__cs
21 #define A__NAME__cc arm_instr_store_w0_word_u1_p0_imm__cc
22 #define A__NAME__mi arm_instr_store_w0_word_u1_p0_imm__mi
23 #define A__NAME__pl arm_instr_store_w0_word_u1_p0_imm__pl
24 #define A__NAME__vs arm_instr_store_w0_word_u1_p0_imm__vs
25 #define A__NAME__vc arm_instr_store_w0_word_u1_p0_imm__vc
26 #define A__NAME__hi arm_instr_store_w0_word_u1_p0_imm__hi
27 #define A__NAME__ls arm_instr_store_w0_word_u1_p0_imm__ls
28 #define A__NAME__ge arm_instr_store_w0_word_u1_p0_imm__ge
29 #define A__NAME__lt arm_instr_store_w0_word_u1_p0_imm__lt
30 #define A__NAME__gt arm_instr_store_w0_word_u1_p0_imm__gt
31 #define A__NAME__le arm_instr_store_w0_word_u1_p0_imm__le
32 #define A__NAME_PC arm_instr_store_w0_word_u1_p0_imm_pc
33 #define A__NAME_PC__eq arm_instr_store_w0_word_u1_p0_imm_pc__eq
34 #define A__NAME_PC__ne arm_instr_store_w0_word_u1_p0_imm_pc__ne
35 #define A__NAME_PC__cs arm_instr_store_w0_word_u1_p0_imm_pc__cs
36 #define A__NAME_PC__cc arm_instr_store_w0_word_u1_p0_imm_pc__cc
37 #define A__NAME_PC__mi arm_instr_store_w0_word_u1_p0_imm_pc__mi
38 #define A__NAME_PC__pl arm_instr_store_w0_word_u1_p0_imm_pc__pl
39 #define A__NAME_PC__vs arm_instr_store_w0_word_u1_p0_imm_pc__vs
40 #define A__NAME_PC__vc arm_instr_store_w0_word_u1_p0_imm_pc__vc
41 #define A__NAME_PC__hi arm_instr_store_w0_word_u1_p0_imm_pc__hi
42 #define A__NAME_PC__ls arm_instr_store_w0_word_u1_p0_imm_pc__ls
43 #define A__NAME_PC__ge arm_instr_store_w0_word_u1_p0_imm_pc__ge
44 #define A__NAME_PC__lt arm_instr_store_w0_word_u1_p0_imm_pc__lt
45 #define A__NAME_PC__gt arm_instr_store_w0_word_u1_p0_imm_pc__gt
46 #define A__NAME_PC__le arm_instr_store_w0_word_u1_p0_imm_pc__le
47 #define A__U
49 #undef A__U
50 #undef A__NAME__eq
51 #undef A__NAME__ne
52 #undef A__NAME__cs
53 #undef A__NAME__cc
54 #undef A__NAME__mi
55 #undef A__NAME__pl
56 #undef A__NAME__vs
57 #undef A__NAME__vc
58 #undef A__NAME__hi
59 #undef A__NAME__ls
60 #undef A__NAME__ge
61 #undef A__NAME__lt
62 #undef A__NAME__gt
63 #undef A__NAME__le
64 #undef A__NAME_PC__eq
65 #undef A__NAME_PC__ne
66 #undef A__NAME_PC__cs
67 #undef A__NAME_PC__cc
68 #undef A__NAME_PC__mi
69 #undef A__NAME_PC__pl
70 #undef A__NAME_PC__vs
71 #undef A__NAME_PC__vc
72 #undef A__NAME_PC__hi
73 #undef A__NAME_PC__ls
74 #undef A__NAME_PC__ge
75 #undef A__NAME_PC__lt
76 #undef A__NAME_PC__gt
77 #undef A__NAME_PC__le
78 #undef A__NAME__general
79 #undef A__NAME_PC
80 #undef A__NAME
81 #define A__NAME__general arm_instr_load_w0_word_u1_p0_imm__general
82 #define A__NAME arm_instr_load_w0_word_u1_p0_imm
83 #define A__NAME__eq arm_instr_load_w0_word_u1_p0_imm__eq
84 #define A__NAME__ne arm_instr_load_w0_word_u1_p0_imm__ne
85 #define A__NAME__cs arm_instr_load_w0_word_u1_p0_imm__cs
86 #define A__NAME__cc arm_instr_load_w0_word_u1_p0_imm__cc
87 #define A__NAME__mi arm_instr_load_w0_word_u1_p0_imm__mi
88 #define A__NAME__pl arm_instr_load_w0_word_u1_p0_imm__pl
89 #define A__NAME__vs arm_instr_load_w0_word_u1_p0_imm__vs
90 #define A__NAME__vc arm_instr_load_w0_word_u1_p0_imm__vc
91 #define A__NAME__hi arm_instr_load_w0_word_u1_p0_imm__hi
92 #define A__NAME__ls arm_instr_load_w0_word_u1_p0_imm__ls
93 #define A__NAME__ge arm_instr_load_w0_word_u1_p0_imm__ge
94 #define A__NAME__lt arm_instr_load_w0_word_u1_p0_imm__lt
95 #define A__NAME__gt arm_instr_load_w0_word_u1_p0_imm__gt
96 #define A__NAME__le arm_instr_load_w0_word_u1_p0_imm__le
97 #define A__NAME_PC arm_instr_load_w0_word_u1_p0_imm_pc
98 #define A__NAME_PC__eq arm_instr_load_w0_word_u1_p0_imm_pc__eq
99 #define A__NAME_PC__ne arm_instr_load_w0_word_u1_p0_imm_pc__ne
100 #define A__NAME_PC__cs arm_instr_load_w0_word_u1_p0_imm_pc__cs
101 #define A__NAME_PC__cc arm_instr_load_w0_word_u1_p0_imm_pc__cc
102 #define A__NAME_PC__mi arm_instr_load_w0_word_u1_p0_imm_pc__mi
103 #define A__NAME_PC__pl arm_instr_load_w0_word_u1_p0_imm_pc__pl
104 #define A__NAME_PC__vs arm_instr_load_w0_word_u1_p0_imm_pc__vs
105 #define A__NAME_PC__vc arm_instr_load_w0_word_u1_p0_imm_pc__vc
106 #define A__NAME_PC__hi arm_instr_load_w0_word_u1_p0_imm_pc__hi
107 #define A__NAME_PC__ls arm_instr_load_w0_word_u1_p0_imm_pc__ls
108 #define A__NAME_PC__ge arm_instr_load_w0_word_u1_p0_imm_pc__ge
109 #define A__NAME_PC__lt arm_instr_load_w0_word_u1_p0_imm_pc__lt
110 #define A__NAME_PC__gt arm_instr_load_w0_word_u1_p0_imm_pc__gt
111 #define A__NAME_PC__le arm_instr_load_w0_word_u1_p0_imm_pc__le
112 #define A__L
113 #define A__U
115 #undef A__L
116 #undef A__U
117 #undef A__NAME__eq
118 #undef A__NAME__ne
119 #undef A__NAME__cs
120 #undef A__NAME__cc
121 #undef A__NAME__mi
122 #undef A__NAME__pl
123 #undef A__NAME__vs
124 #undef A__NAME__vc
125 #undef A__NAME__hi
126 #undef A__NAME__ls
127 #undef A__NAME__ge
128 #undef A__NAME__lt
129 #undef A__NAME__gt
130 #undef A__NAME__le
131 #undef A__NAME_PC__eq
132 #undef A__NAME_PC__ne
133 #undef A__NAME_PC__cs
134 #undef A__NAME_PC__cc
135 #undef A__NAME_PC__mi
136 #undef A__NAME_PC__pl
137 #undef A__NAME_PC__vs
138 #undef A__NAME_PC__vc
139 #undef A__NAME_PC__hi
140 #undef A__NAME_PC__ls
141 #undef A__NAME_PC__ge
142 #undef A__NAME_PC__lt
143 #undef A__NAME_PC__gt
144 #undef A__NAME_PC__le
145 #undef A__NAME__general
146 #undef A__NAME_PC
147 #undef A__NAME
148 #define A__NAME__general arm_instr_store_w0_byte_u1_p0_imm__general
149 #define A__NAME arm_instr_store_w0_byte_u1_p0_imm
150 #define A__NAME__eq arm_instr_store_w0_byte_u1_p0_imm__eq
151 #define A__NAME__ne arm_instr_store_w0_byte_u1_p0_imm__ne
152 #define A__NAME__cs arm_instr_store_w0_byte_u1_p0_imm__cs
153 #define A__NAME__cc arm_instr_store_w0_byte_u1_p0_imm__cc
154 #define A__NAME__mi arm_instr_store_w0_byte_u1_p0_imm__mi
155 #define A__NAME__pl arm_instr_store_w0_byte_u1_p0_imm__pl
156 #define A__NAME__vs arm_instr_store_w0_byte_u1_p0_imm__vs
157 #define A__NAME__vc arm_instr_store_w0_byte_u1_p0_imm__vc
158 #define A__NAME__hi arm_instr_store_w0_byte_u1_p0_imm__hi
159 #define A__NAME__ls arm_instr_store_w0_byte_u1_p0_imm__ls
160 #define A__NAME__ge arm_instr_store_w0_byte_u1_p0_imm__ge
161 #define A__NAME__lt arm_instr_store_w0_byte_u1_p0_imm__lt
162 #define A__NAME__gt arm_instr_store_w0_byte_u1_p0_imm__gt
163 #define A__NAME__le arm_instr_store_w0_byte_u1_p0_imm__le
164 #define A__NAME_PC arm_instr_store_w0_byte_u1_p0_imm_pc
165 #define A__NAME_PC__eq arm_instr_store_w0_byte_u1_p0_imm_pc__eq
166 #define A__NAME_PC__ne arm_instr_store_w0_byte_u1_p0_imm_pc__ne
167 #define A__NAME_PC__cs arm_instr_store_w0_byte_u1_p0_imm_pc__cs
168 #define A__NAME_PC__cc arm_instr_store_w0_byte_u1_p0_imm_pc__cc
169 #define A__NAME_PC__mi arm_instr_store_w0_byte_u1_p0_imm_pc__mi
170 #define A__NAME_PC__pl arm_instr_store_w0_byte_u1_p0_imm_pc__pl
171 #define A__NAME_PC__vs arm_instr_store_w0_byte_u1_p0_imm_pc__vs
172 #define A__NAME_PC__vc arm_instr_store_w0_byte_u1_p0_imm_pc__vc
173 #define A__NAME_PC__hi arm_instr_store_w0_byte_u1_p0_imm_pc__hi
174 #define A__NAME_PC__ls arm_instr_store_w0_byte_u1_p0_imm_pc__ls
175 #define A__NAME_PC__ge arm_instr_store_w0_byte_u1_p0_imm_pc__ge
176 #define A__NAME_PC__lt arm_instr_store_w0_byte_u1_p0_imm_pc__lt
177 #define A__NAME_PC__gt arm_instr_store_w0_byte_u1_p0_imm_pc__gt
178 #define A__NAME_PC__le arm_instr_store_w0_byte_u1_p0_imm_pc__le
179 #define A__B
180 #define A__U
182 #undef A__B
183 #undef A__U
184 #undef A__NAME__eq
185 #undef A__NAME__ne
186 #undef A__NAME__cs
187 #undef A__NAME__cc
188 #undef A__NAME__mi
189 #undef A__NAME__pl
190 #undef A__NAME__vs
191 #undef A__NAME__vc
192 #undef A__NAME__hi
193 #undef A__NAME__ls
194 #undef A__NAME__ge
195 #undef A__NAME__lt
196 #undef A__NAME__gt
197 #undef A__NAME__le
198 #undef A__NAME_PC__eq
199 #undef A__NAME_PC__ne
200 #undef A__NAME_PC__cs
201 #undef A__NAME_PC__cc
202 #undef A__NAME_PC__mi
203 #undef A__NAME_PC__pl
204 #undef A__NAME_PC__vs
205 #undef A__NAME_PC__vc
206 #undef A__NAME_PC__hi
207 #undef A__NAME_PC__ls
208 #undef A__NAME_PC__ge
209 #undef A__NAME_PC__lt
210 #undef A__NAME_PC__gt
211 #undef A__NAME_PC__le
212 #undef A__NAME__general
213 #undef A__NAME_PC
214 #undef A__NAME
215 #define A__NAME__general arm_instr_load_w0_byte_u1_p0_imm__general
216 #define A__NAME arm_instr_load_w0_byte_u1_p0_imm
217 #define A__NAME__eq arm_instr_load_w0_byte_u1_p0_imm__eq
218 #define A__NAME__ne arm_instr_load_w0_byte_u1_p0_imm__ne
219 #define A__NAME__cs arm_instr_load_w0_byte_u1_p0_imm__cs
220 #define A__NAME__cc arm_instr_load_w0_byte_u1_p0_imm__cc
221 #define A__NAME__mi arm_instr_load_w0_byte_u1_p0_imm__mi
222 #define A__NAME__pl arm_instr_load_w0_byte_u1_p0_imm__pl
223 #define A__NAME__vs arm_instr_load_w0_byte_u1_p0_imm__vs
224 #define A__NAME__vc arm_instr_load_w0_byte_u1_p0_imm__vc
225 #define A__NAME__hi arm_instr_load_w0_byte_u1_p0_imm__hi
226 #define A__NAME__ls arm_instr_load_w0_byte_u1_p0_imm__ls
227 #define A__NAME__ge arm_instr_load_w0_byte_u1_p0_imm__ge
228 #define A__NAME__lt arm_instr_load_w0_byte_u1_p0_imm__lt
229 #define A__NAME__gt arm_instr_load_w0_byte_u1_p0_imm__gt
230 #define A__NAME__le arm_instr_load_w0_byte_u1_p0_imm__le
231 #define A__NAME_PC arm_instr_load_w0_byte_u1_p0_imm_pc
232 #define A__NAME_PC__eq arm_instr_load_w0_byte_u1_p0_imm_pc__eq
233 #define A__NAME_PC__ne arm_instr_load_w0_byte_u1_p0_imm_pc__ne
234 #define A__NAME_PC__cs arm_instr_load_w0_byte_u1_p0_imm_pc__cs
235 #define A__NAME_PC__cc arm_instr_load_w0_byte_u1_p0_imm_pc__cc
236 #define A__NAME_PC__mi arm_instr_load_w0_byte_u1_p0_imm_pc__mi
237 #define A__NAME_PC__pl arm_instr_load_w0_byte_u1_p0_imm_pc__pl
238 #define A__NAME_PC__vs arm_instr_load_w0_byte_u1_p0_imm_pc__vs
239 #define A__NAME_PC__vc arm_instr_load_w0_byte_u1_p0_imm_pc__vc
240 #define A__NAME_PC__hi arm_instr_load_w0_byte_u1_p0_imm_pc__hi
241 #define A__NAME_PC__ls arm_instr_load_w0_byte_u1_p0_imm_pc__ls
242 #define A__NAME_PC__ge arm_instr_load_w0_byte_u1_p0_imm_pc__ge
243 #define A__NAME_PC__lt arm_instr_load_w0_byte_u1_p0_imm_pc__lt
244 #define A__NAME_PC__gt arm_instr_load_w0_byte_u1_p0_imm_pc__gt
245 #define A__NAME_PC__le arm_instr_load_w0_byte_u1_p0_imm_pc__le
246 #define A__L
247 #define A__B
248 #define A__U
250 #undef A__L
251 #undef A__B
252 #undef A__U
253 #undef A__NAME__eq
254 #undef A__NAME__ne
255 #undef A__NAME__cs
256 #undef A__NAME__cc
257 #undef A__NAME__mi
258 #undef A__NAME__pl
259 #undef A__NAME__vs
260 #undef A__NAME__vc
261 #undef A__NAME__hi
262 #undef A__NAME__ls
263 #undef A__NAME__ge
264 #undef A__NAME__lt
265 #undef A__NAME__gt
266 #undef A__NAME__le
267 #undef A__NAME_PC__eq
268 #undef A__NAME_PC__ne
269 #undef A__NAME_PC__cs
270 #undef A__NAME_PC__cc
271 #undef A__NAME_PC__mi
272 #undef A__NAME_PC__pl
273 #undef A__NAME_PC__vs
274 #undef A__NAME_PC__vc
275 #undef A__NAME_PC__hi
276 #undef A__NAME_PC__ls
277 #undef A__NAME_PC__ge
278 #undef A__NAME_PC__lt
279 #undef A__NAME_PC__gt
280 #undef A__NAME_PC__le
281 #undef A__NAME__general
282 #undef A__NAME_PC
283 #undef A__NAME
284 #define A__NAME__general arm_instr_store_w0_word_u1_p0_reg__general
285 #define A__NAME arm_instr_store_w0_word_u1_p0_reg
286 #define A__NAME__eq arm_instr_store_w0_word_u1_p0_reg__eq
287 #define A__NAME__ne arm_instr_store_w0_word_u1_p0_reg__ne
288 #define A__NAME__cs arm_instr_store_w0_word_u1_p0_reg__cs
289 #define A__NAME__cc arm_instr_store_w0_word_u1_p0_reg__cc
290 #define A__NAME__mi arm_instr_store_w0_word_u1_p0_reg__mi
291 #define A__NAME__pl arm_instr_store_w0_word_u1_p0_reg__pl
292 #define A__NAME__vs arm_instr_store_w0_word_u1_p0_reg__vs
293 #define A__NAME__vc arm_instr_store_w0_word_u1_p0_reg__vc
294 #define A__NAME__hi arm_instr_store_w0_word_u1_p0_reg__hi
295 #define A__NAME__ls arm_instr_store_w0_word_u1_p0_reg__ls
296 #define A__NAME__ge arm_instr_store_w0_word_u1_p0_reg__ge
297 #define A__NAME__lt arm_instr_store_w0_word_u1_p0_reg__lt
298 #define A__NAME__gt arm_instr_store_w0_word_u1_p0_reg__gt
299 #define A__NAME__le arm_instr_store_w0_word_u1_p0_reg__le
300 #define A__NAME_PC arm_instr_store_w0_word_u1_p0_reg_pc
301 #define A__NAME_PC__eq arm_instr_store_w0_word_u1_p0_reg_pc__eq
302 #define A__NAME_PC__ne arm_instr_store_w0_word_u1_p0_reg_pc__ne
303 #define A__NAME_PC__cs arm_instr_store_w0_word_u1_p0_reg_pc__cs
304 #define A__NAME_PC__cc arm_instr_store_w0_word_u1_p0_reg_pc__cc
305 #define A__NAME_PC__mi arm_instr_store_w0_word_u1_p0_reg_pc__mi
306 #define A__NAME_PC__pl arm_instr_store_w0_word_u1_p0_reg_pc__pl
307 #define A__NAME_PC__vs arm_instr_store_w0_word_u1_p0_reg_pc__vs
308 #define A__NAME_PC__vc arm_instr_store_w0_word_u1_p0_reg_pc__vc
309 #define A__NAME_PC__hi arm_instr_store_w0_word_u1_p0_reg_pc__hi
310 #define A__NAME_PC__ls arm_instr_store_w0_word_u1_p0_reg_pc__ls
311 #define A__NAME_PC__ge arm_instr_store_w0_word_u1_p0_reg_pc__ge
312 #define A__NAME_PC__lt arm_instr_store_w0_word_u1_p0_reg_pc__lt
313 #define A__NAME_PC__gt arm_instr_store_w0_word_u1_p0_reg_pc__gt
314 #define A__NAME_PC__le arm_instr_store_w0_word_u1_p0_reg_pc__le
315 #define A__U
316 #define A__REG
318 #undef A__U
319 #undef A__REG
320 #undef A__NAME__eq
321 #undef A__NAME__ne
322 #undef A__NAME__cs
323 #undef A__NAME__cc
324 #undef A__NAME__mi
325 #undef A__NAME__pl
326 #undef A__NAME__vs
327 #undef A__NAME__vc
328 #undef A__NAME__hi
329 #undef A__NAME__ls
330 #undef A__NAME__ge
331 #undef A__NAME__lt
332 #undef A__NAME__gt
333 #undef A__NAME__le
334 #undef A__NAME_PC__eq
335 #undef A__NAME_PC__ne
336 #undef A__NAME_PC__cs
337 #undef A__NAME_PC__cc
338 #undef A__NAME_PC__mi
339 #undef A__NAME_PC__pl
340 #undef A__NAME_PC__vs
341 #undef A__NAME_PC__vc
342 #undef A__NAME_PC__hi
343 #undef A__NAME_PC__ls
344 #undef A__NAME_PC__ge
345 #undef A__NAME_PC__lt
346 #undef A__NAME_PC__gt
347 #undef A__NAME_PC__le
348 #undef A__NAME__general
349 #undef A__NAME_PC
350 #undef A__NAME
351 #define A__NAME__general arm_instr_load_w0_word_u1_p0_reg__general
352 #define A__NAME arm_instr_load_w0_word_u1_p0_reg
353 #define A__NAME__eq arm_instr_load_w0_word_u1_p0_reg__eq
354 #define A__NAME__ne arm_instr_load_w0_word_u1_p0_reg__ne
355 #define A__NAME__cs arm_instr_load_w0_word_u1_p0_reg__cs
356 #define A__NAME__cc arm_instr_load_w0_word_u1_p0_reg__cc
357 #define A__NAME__mi arm_instr_load_w0_word_u1_p0_reg__mi
358 #define A__NAME__pl arm_instr_load_w0_word_u1_p0_reg__pl
359 #define A__NAME__vs arm_instr_load_w0_word_u1_p0_reg__vs
360 #define A__NAME__vc arm_instr_load_w0_word_u1_p0_reg__vc
361 #define A__NAME__hi arm_instr_load_w0_word_u1_p0_reg__hi
362 #define A__NAME__ls arm_instr_load_w0_word_u1_p0_reg__ls
363 #define A__NAME__ge arm_instr_load_w0_word_u1_p0_reg__ge
364 #define A__NAME__lt arm_instr_load_w0_word_u1_p0_reg__lt
365 #define A__NAME__gt arm_instr_load_w0_word_u1_p0_reg__gt
366 #define A__NAME__le arm_instr_load_w0_word_u1_p0_reg__le
367 #define A__NAME_PC arm_instr_load_w0_word_u1_p0_reg_pc
368 #define A__NAME_PC__eq arm_instr_load_w0_word_u1_p0_reg_pc__eq
369 #define A__NAME_PC__ne arm_instr_load_w0_word_u1_p0_reg_pc__ne
370 #define A__NAME_PC__cs arm_instr_load_w0_word_u1_p0_reg_pc__cs
371 #define A__NAME_PC__cc arm_instr_load_w0_word_u1_p0_reg_pc__cc
372 #define A__NAME_PC__mi arm_instr_load_w0_word_u1_p0_reg_pc__mi
373 #define A__NAME_PC__pl arm_instr_load_w0_word_u1_p0_reg_pc__pl
374 #define A__NAME_PC__vs arm_instr_load_w0_word_u1_p0_reg_pc__vs
375 #define A__NAME_PC__vc arm_instr_load_w0_word_u1_p0_reg_pc__vc
376 #define A__NAME_PC__hi arm_instr_load_w0_word_u1_p0_reg_pc__hi
377 #define A__NAME_PC__ls arm_instr_load_w0_word_u1_p0_reg_pc__ls
378 #define A__NAME_PC__ge arm_instr_load_w0_word_u1_p0_reg_pc__ge
379 #define A__NAME_PC__lt arm_instr_load_w0_word_u1_p0_reg_pc__lt
380 #define A__NAME_PC__gt arm_instr_load_w0_word_u1_p0_reg_pc__gt
381 #define A__NAME_PC__le arm_instr_load_w0_word_u1_p0_reg_pc__le
382 #define A__L
383 #define A__U
384 #define A__REG
386 #undef A__L
387 #undef A__U
388 #undef A__REG
389 #undef A__NAME__eq
390 #undef A__NAME__ne
391 #undef A__NAME__cs
392 #undef A__NAME__cc
393 #undef A__NAME__mi
394 #undef A__NAME__pl
395 #undef A__NAME__vs
396 #undef A__NAME__vc
397 #undef A__NAME__hi
398 #undef A__NAME__ls
399 #undef A__NAME__ge
400 #undef A__NAME__lt
401 #undef A__NAME__gt
402 #undef A__NAME__le
403 #undef A__NAME_PC__eq
404 #undef A__NAME_PC__ne
405 #undef A__NAME_PC__cs
406 #undef A__NAME_PC__cc
407 #undef A__NAME_PC__mi
408 #undef A__NAME_PC__pl
409 #undef A__NAME_PC__vs
410 #undef A__NAME_PC__vc
411 #undef A__NAME_PC__hi
412 #undef A__NAME_PC__ls
413 #undef A__NAME_PC__ge
414 #undef A__NAME_PC__lt
415 #undef A__NAME_PC__gt
416 #undef A__NAME_PC__le
417 #undef A__NAME__general
418 #undef A__NAME_PC
419 #undef A__NAME
420 #define A__NAME__general arm_instr_store_w0_byte_u1_p0_reg__general
421 #define A__NAME arm_instr_store_w0_byte_u1_p0_reg
422 #define A__NAME__eq arm_instr_store_w0_byte_u1_p0_reg__eq
423 #define A__NAME__ne arm_instr_store_w0_byte_u1_p0_reg__ne
424 #define A__NAME__cs arm_instr_store_w0_byte_u1_p0_reg__cs
425 #define A__NAME__cc arm_instr_store_w0_byte_u1_p0_reg__cc
426 #define A__NAME__mi arm_instr_store_w0_byte_u1_p0_reg__mi
427 #define A__NAME__pl arm_instr_store_w0_byte_u1_p0_reg__pl
428 #define A__NAME__vs arm_instr_store_w0_byte_u1_p0_reg__vs
429 #define A__NAME__vc arm_instr_store_w0_byte_u1_p0_reg__vc
430 #define A__NAME__hi arm_instr_store_w0_byte_u1_p0_reg__hi
431 #define A__NAME__ls arm_instr_store_w0_byte_u1_p0_reg__ls
432 #define A__NAME__ge arm_instr_store_w0_byte_u1_p0_reg__ge
433 #define A__NAME__lt arm_instr_store_w0_byte_u1_p0_reg__lt
434 #define A__NAME__gt arm_instr_store_w0_byte_u1_p0_reg__gt
435 #define A__NAME__le arm_instr_store_w0_byte_u1_p0_reg__le
436 #define A__NAME_PC arm_instr_store_w0_byte_u1_p0_reg_pc
437 #define A__NAME_PC__eq arm_instr_store_w0_byte_u1_p0_reg_pc__eq
438 #define A__NAME_PC__ne arm_instr_store_w0_byte_u1_p0_reg_pc__ne
439 #define A__NAME_PC__cs arm_instr_store_w0_byte_u1_p0_reg_pc__cs
440 #define A__NAME_PC__cc arm_instr_store_w0_byte_u1_p0_reg_pc__cc
441 #define A__NAME_PC__mi arm_instr_store_w0_byte_u1_p0_reg_pc__mi
442 #define A__NAME_PC__pl arm_instr_store_w0_byte_u1_p0_reg_pc__pl
443 #define A__NAME_PC__vs arm_instr_store_w0_byte_u1_p0_reg_pc__vs
444 #define A__NAME_PC__vc arm_instr_store_w0_byte_u1_p0_reg_pc__vc
445 #define A__NAME_PC__hi arm_instr_store_w0_byte_u1_p0_reg_pc__hi
446 #define A__NAME_PC__ls arm_instr_store_w0_byte_u1_p0_reg_pc__ls
447 #define A__NAME_PC__ge arm_instr_store_w0_byte_u1_p0_reg_pc__ge
448 #define A__NAME_PC__lt arm_instr_store_w0_byte_u1_p0_reg_pc__lt
449 #define A__NAME_PC__gt arm_instr_store_w0_byte_u1_p0_reg_pc__gt
450 #define A__NAME_PC__le arm_instr_store_w0_byte_u1_p0_reg_pc__le
451 #define A__B
452 #define A__U
453 #define A__REG
455 #undef A__B
456 #undef A__U
457 #undef A__REG
458 #undef A__NAME__eq
459 #undef A__NAME__ne
460 #undef A__NAME__cs
461 #undef A__NAME__cc
462 #undef A__NAME__mi
463 #undef A__NAME__pl
464 #undef A__NAME__vs
465 #undef A__NAME__vc
466 #undef A__NAME__hi
467 #undef A__NAME__ls
468 #undef A__NAME__ge
469 #undef A__NAME__lt
470 #undef A__NAME__gt
471 #undef A__NAME__le
472 #undef A__NAME_PC__eq
473 #undef A__NAME_PC__ne
474 #undef A__NAME_PC__cs
475 #undef A__NAME_PC__cc
476 #undef A__NAME_PC__mi
477 #undef A__NAME_PC__pl
478 #undef A__NAME_PC__vs
479 #undef A__NAME_PC__vc
480 #undef A__NAME_PC__hi
481 #undef A__NAME_PC__ls
482 #undef A__NAME_PC__ge
483 #undef A__NAME_PC__lt
484 #undef A__NAME_PC__gt
485 #undef A__NAME_PC__le
486 #undef A__NAME__general
487 #undef A__NAME_PC
488 #undef A__NAME
489 #define A__NAME__general arm_instr_load_w0_byte_u1_p0_reg__general
490 #define A__NAME arm_instr_load_w0_byte_u1_p0_reg
491 #define A__NAME__eq arm_instr_load_w0_byte_u1_p0_reg__eq
492 #define A__NAME__ne arm_instr_load_w0_byte_u1_p0_reg__ne
493 #define A__NAME__cs arm_instr_load_w0_byte_u1_p0_reg__cs
494 #define A__NAME__cc arm_instr_load_w0_byte_u1_p0_reg__cc
495 #define A__NAME__mi arm_instr_load_w0_byte_u1_p0_reg__mi
496 #define A__NAME__pl arm_instr_load_w0_byte_u1_p0_reg__pl
497 #define A__NAME__vs arm_instr_load_w0_byte_u1_p0_reg__vs
498 #define A__NAME__vc arm_instr_load_w0_byte_u1_p0_reg__vc
499 #define A__NAME__hi arm_instr_load_w0_byte_u1_p0_reg__hi
500 #define A__NAME__ls arm_instr_load_w0_byte_u1_p0_reg__ls
501 #define A__NAME__ge arm_instr_load_w0_byte_u1_p0_reg__ge
502 #define A__NAME__lt arm_instr_load_w0_byte_u1_p0_reg__lt
503 #define A__NAME__gt arm_instr_load_w0_byte_u1_p0_reg__gt
504 #define A__NAME__le arm_instr_load_w0_byte_u1_p0_reg__le
505 #define A__NAME_PC arm_instr_load_w0_byte_u1_p0_reg_pc
506 #define A__NAME_PC__eq arm_instr_load_w0_byte_u1_p0_reg_pc__eq
507 #define A__NAME_PC__ne arm_instr_load_w0_byte_u1_p0_reg_pc__ne
508 #define A__NAME_PC__cs arm_instr_load_w0_byte_u1_p0_reg_pc__cs
509 #define A__NAME_PC__cc arm_instr_load_w0_byte_u1_p0_reg_pc__cc
510 #define A__NAME_PC__mi arm_instr_load_w0_byte_u1_p0_reg_pc__mi
511 #define A__NAME_PC__pl arm_instr_load_w0_byte_u1_p0_reg_pc__pl
512 #define A__NAME_PC__vs arm_instr_load_w0_byte_u1_p0_reg_pc__vs
513 #define A__NAME_PC__vc arm_instr_load_w0_byte_u1_p0_reg_pc__vc
514 #define A__NAME_PC__hi arm_instr_load_w0_byte_u1_p0_reg_pc__hi
515 #define A__NAME_PC__ls arm_instr_load_w0_byte_u1_p0_reg_pc__ls
516 #define A__NAME_PC__ge arm_instr_load_w0_byte_u1_p0_reg_pc__ge
517 #define A__NAME_PC__lt arm_instr_load_w0_byte_u1_p0_reg_pc__lt
518 #define A__NAME_PC__gt arm_instr_load_w0_byte_u1_p0_reg_pc__gt
519 #define A__NAME_PC__le arm_instr_load_w0_byte_u1_p0_reg_pc__le
520 #define A__L
521 #define A__B
522 #define A__U
523 #define A__REG
525 #undef A__L
526 #undef A__B
527 #undef A__U
528 #undef A__REG
529 #undef A__NAME__eq
530 #undef A__NAME__ne
531 #undef A__NAME__cs
532 #undef A__NAME__cc
533 #undef A__NAME__mi
534 #undef A__NAME__pl
535 #undef A__NAME__vs
536 #undef A__NAME__vc
537 #undef A__NAME__hi
538 #undef A__NAME__ls
539 #undef A__NAME__ge
540 #undef A__NAME__lt
541 #undef A__NAME__gt
542 #undef A__NAME__le
543 #undef A__NAME_PC__eq
544 #undef A__NAME_PC__ne
545 #undef A__NAME_PC__cs
546 #undef A__NAME_PC__cc
547 #undef A__NAME_PC__mi
548 #undef A__NAME_PC__pl
549 #undef A__NAME_PC__vs
550 #undef A__NAME_PC__vc
551 #undef A__NAME_PC__hi
552 #undef A__NAME_PC__ls
553 #undef A__NAME_PC__ge
554 #undef A__NAME_PC__lt
555 #undef A__NAME_PC__gt
556 #undef A__NAME_PC__le
557 #undef A__NAME__general
558 #undef A__NAME_PC
559 #undef A__NAME
560 #define A__NAME__general arm_instr_store_w0_signed_byte_u1_p0_imm__general
561 #define A__NAME arm_instr_store_w0_signed_byte_u1_p0_imm
562 #define A__NAME__eq arm_instr_store_w0_signed_byte_u1_p0_imm__eq
563 #define A__NAME__ne arm_instr_store_w0_signed_byte_u1_p0_imm__ne
564 #define A__NAME__cs arm_instr_store_w0_signed_byte_u1_p0_imm__cs
565 #define A__NAME__cc arm_instr_store_w0_signed_byte_u1_p0_imm__cc
566 #define A__NAME__mi arm_instr_store_w0_signed_byte_u1_p0_imm__mi
567 #define A__NAME__pl arm_instr_store_w0_signed_byte_u1_p0_imm__pl
568 #define A__NAME__vs arm_instr_store_w0_signed_byte_u1_p0_imm__vs
569 #define A__NAME__vc arm_instr_store_w0_signed_byte_u1_p0_imm__vc
570 #define A__NAME__hi arm_instr_store_w0_signed_byte_u1_p0_imm__hi
571 #define A__NAME__ls arm_instr_store_w0_signed_byte_u1_p0_imm__ls
572 #define A__NAME__ge arm_instr_store_w0_signed_byte_u1_p0_imm__ge
573 #define A__NAME__lt arm_instr_store_w0_signed_byte_u1_p0_imm__lt
574 #define A__NAME__gt arm_instr_store_w0_signed_byte_u1_p0_imm__gt
575 #define A__NAME__le arm_instr_store_w0_signed_byte_u1_p0_imm__le
576 #define A__NAME_PC arm_instr_store_w0_signed_byte_u1_p0_imm_pc
577 #define A__NAME_PC__eq arm_instr_store_w0_signed_byte_u1_p0_imm_pc__eq
578 #define A__NAME_PC__ne arm_instr_store_w0_signed_byte_u1_p0_imm_pc__ne
579 #define A__NAME_PC__cs arm_instr_store_w0_signed_byte_u1_p0_imm_pc__cs
580 #define A__NAME_PC__cc arm_instr_store_w0_signed_byte_u1_p0_imm_pc__cc
581 #define A__NAME_PC__mi arm_instr_store_w0_signed_byte_u1_p0_imm_pc__mi
582 #define A__NAME_PC__pl arm_instr_store_w0_signed_byte_u1_p0_imm_pc__pl
583 #define A__NAME_PC__vs arm_instr_store_w0_signed_byte_u1_p0_imm_pc__vs
584 #define A__NAME_PC__vc arm_instr_store_w0_signed_byte_u1_p0_imm_pc__vc
585 #define A__NAME_PC__hi arm_instr_store_w0_signed_byte_u1_p0_imm_pc__hi
586 #define A__NAME_PC__ls arm_instr_store_w0_signed_byte_u1_p0_imm_pc__ls
587 #define A__NAME_PC__ge arm_instr_store_w0_signed_byte_u1_p0_imm_pc__ge
588 #define A__NAME_PC__lt arm_instr_store_w0_signed_byte_u1_p0_imm_pc__lt
589 #define A__NAME_PC__gt arm_instr_store_w0_signed_byte_u1_p0_imm_pc__gt
590 #define A__NAME_PC__le arm_instr_store_w0_signed_byte_u1_p0_imm_pc__le
591 #define A__SIGNED
592 #define A__B
593 #define A__U
595 #undef A__SIGNED
596 #undef A__B
597 #undef A__U
598 #undef A__NAME__eq
599 #undef A__NAME__ne
600 #undef A__NAME__cs
601 #undef A__NAME__cc
602 #undef A__NAME__mi
603 #undef A__NAME__pl
604 #undef A__NAME__vs
605 #undef A__NAME__vc
606 #undef A__NAME__hi
607 #undef A__NAME__ls
608 #undef A__NAME__ge
609 #undef A__NAME__lt
610 #undef A__NAME__gt
611 #undef A__NAME__le
612 #undef A__NAME_PC__eq
613 #undef A__NAME_PC__ne
614 #undef A__NAME_PC__cs
615 #undef A__NAME_PC__cc
616 #undef A__NAME_PC__mi
617 #undef A__NAME_PC__pl
618 #undef A__NAME_PC__vs
619 #undef A__NAME_PC__vc
620 #undef A__NAME_PC__hi
621 #undef A__NAME_PC__ls
622 #undef A__NAME_PC__ge
623 #undef A__NAME_PC__lt
624 #undef A__NAME_PC__gt
625 #undef A__NAME_PC__le
626 #undef A__NAME__general
627 #undef A__NAME_PC
628 #undef A__NAME
629 #define A__NAME__general arm_instr_load_w0_signed_byte_u1_p0_imm__general
630 #define A__NAME arm_instr_load_w0_signed_byte_u1_p0_imm
631 #define A__NAME__eq arm_instr_load_w0_signed_byte_u1_p0_imm__eq
632 #define A__NAME__ne arm_instr_load_w0_signed_byte_u1_p0_imm__ne
633 #define A__NAME__cs arm_instr_load_w0_signed_byte_u1_p0_imm__cs
634 #define A__NAME__cc arm_instr_load_w0_signed_byte_u1_p0_imm__cc
635 #define A__NAME__mi arm_instr_load_w0_signed_byte_u1_p0_imm__mi
636 #define A__NAME__pl arm_instr_load_w0_signed_byte_u1_p0_imm__pl
637 #define A__NAME__vs arm_instr_load_w0_signed_byte_u1_p0_imm__vs
638 #define A__NAME__vc arm_instr_load_w0_signed_byte_u1_p0_imm__vc
639 #define A__NAME__hi arm_instr_load_w0_signed_byte_u1_p0_imm__hi
640 #define A__NAME__ls arm_instr_load_w0_signed_byte_u1_p0_imm__ls
641 #define A__NAME__ge arm_instr_load_w0_signed_byte_u1_p0_imm__ge
642 #define A__NAME__lt arm_instr_load_w0_signed_byte_u1_p0_imm__lt
643 #define A__NAME__gt arm_instr_load_w0_signed_byte_u1_p0_imm__gt
644 #define A__NAME__le arm_instr_load_w0_signed_byte_u1_p0_imm__le
645 #define A__NAME_PC arm_instr_load_w0_signed_byte_u1_p0_imm_pc
646 #define A__NAME_PC__eq arm_instr_load_w0_signed_byte_u1_p0_imm_pc__eq
647 #define A__NAME_PC__ne arm_instr_load_w0_signed_byte_u1_p0_imm_pc__ne
648 #define A__NAME_PC__cs arm_instr_load_w0_signed_byte_u1_p0_imm_pc__cs
649 #define A__NAME_PC__cc arm_instr_load_w0_signed_byte_u1_p0_imm_pc__cc
650 #define A__NAME_PC__mi arm_instr_load_w0_signed_byte_u1_p0_imm_pc__mi
651 #define A__NAME_PC__pl arm_instr_load_w0_signed_byte_u1_p0_imm_pc__pl
652 #define A__NAME_PC__vs arm_instr_load_w0_signed_byte_u1_p0_imm_pc__vs
653 #define A__NAME_PC__vc arm_instr_load_w0_signed_byte_u1_p0_imm_pc__vc
654 #define A__NAME_PC__hi arm_instr_load_w0_signed_byte_u1_p0_imm_pc__hi
655 #define A__NAME_PC__ls arm_instr_load_w0_signed_byte_u1_p0_imm_pc__ls
656 #define A__NAME_PC__ge arm_instr_load_w0_signed_byte_u1_p0_imm_pc__ge
657 #define A__NAME_PC__lt arm_instr_load_w0_signed_byte_u1_p0_imm_pc__lt
658 #define A__NAME_PC__gt arm_instr_load_w0_signed_byte_u1_p0_imm_pc__gt
659 #define A__NAME_PC__le arm_instr_load_w0_signed_byte_u1_p0_imm_pc__le
660 #define A__SIGNED
661 #define A__L
662 #define A__B
663 #define A__U
665 #undef A__SIGNED
666 #undef A__L
667 #undef A__B
668 #undef A__U
669 #undef A__NAME__eq
670 #undef A__NAME__ne
671 #undef A__NAME__cs
672 #undef A__NAME__cc
673 #undef A__NAME__mi
674 #undef A__NAME__pl
675 #undef A__NAME__vs
676 #undef A__NAME__vc
677 #undef A__NAME__hi
678 #undef A__NAME__ls
679 #undef A__NAME__ge
680 #undef A__NAME__lt
681 #undef A__NAME__gt
682 #undef A__NAME__le
683 #undef A__NAME_PC__eq
684 #undef A__NAME_PC__ne
685 #undef A__NAME_PC__cs
686 #undef A__NAME_PC__cc
687 #undef A__NAME_PC__mi
688 #undef A__NAME_PC__pl
689 #undef A__NAME_PC__vs
690 #undef A__NAME_PC__vc
691 #undef A__NAME_PC__hi
692 #undef A__NAME_PC__ls
693 #undef A__NAME_PC__ge
694 #undef A__NAME_PC__lt
695 #undef A__NAME_PC__gt
696 #undef A__NAME_PC__le
697 #undef A__NAME__general
698 #undef A__NAME_PC
699 #undef A__NAME
700 #define A__NAME__general arm_instr_store_w0_unsigned_halfword_u1_p0_imm__general
701 #define A__NAME arm_instr_store_w0_unsigned_halfword_u1_p0_imm
702 #define A__NAME__eq arm_instr_store_w0_unsigned_halfword_u1_p0_imm__eq
703 #define A__NAME__ne arm_instr_store_w0_unsigned_halfword_u1_p0_imm__ne
704 #define A__NAME__cs arm_instr_store_w0_unsigned_halfword_u1_p0_imm__cs
705 #define A__NAME__cc arm_instr_store_w0_unsigned_halfword_u1_p0_imm__cc
706 #define A__NAME__mi arm_instr_store_w0_unsigned_halfword_u1_p0_imm__mi
707 #define A__NAME__pl arm_instr_store_w0_unsigned_halfword_u1_p0_imm__pl
708 #define A__NAME__vs arm_instr_store_w0_unsigned_halfword_u1_p0_imm__vs
709 #define A__NAME__vc arm_instr_store_w0_unsigned_halfword_u1_p0_imm__vc
710 #define A__NAME__hi arm_instr_store_w0_unsigned_halfword_u1_p0_imm__hi
711 #define A__NAME__ls arm_instr_store_w0_unsigned_halfword_u1_p0_imm__ls
712 #define A__NAME__ge arm_instr_store_w0_unsigned_halfword_u1_p0_imm__ge
713 #define A__NAME__lt arm_instr_store_w0_unsigned_halfword_u1_p0_imm__lt
714 #define A__NAME__gt arm_instr_store_w0_unsigned_halfword_u1_p0_imm__gt
715 #define A__NAME__le arm_instr_store_w0_unsigned_halfword_u1_p0_imm__le
716 #define A__NAME_PC arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc
717 #define A__NAME_PC__eq arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__eq
718 #define A__NAME_PC__ne arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__ne
719 #define A__NAME_PC__cs arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__cs
720 #define A__NAME_PC__cc arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__cc
721 #define A__NAME_PC__mi arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__mi
722 #define A__NAME_PC__pl arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__pl
723 #define A__NAME_PC__vs arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__vs
724 #define A__NAME_PC__vc arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__vc
725 #define A__NAME_PC__hi arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__hi
726 #define A__NAME_PC__ls arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__ls
727 #define A__NAME_PC__ge arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__ge
728 #define A__NAME_PC__lt arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__lt
729 #define A__NAME_PC__gt arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__gt
730 #define A__NAME_PC__le arm_instr_store_w0_unsigned_halfword_u1_p0_imm_pc__le
731 #define A__H
732 #define A__U
734 #undef A__H
735 #undef A__U
736 #undef A__NAME__eq
737 #undef A__NAME__ne
738 #undef A__NAME__cs
739 #undef A__NAME__cc
740 #undef A__NAME__mi
741 #undef A__NAME__pl
742 #undef A__NAME__vs
743 #undef A__NAME__vc
744 #undef A__NAME__hi
745 #undef A__NAME__ls
746 #undef A__NAME__ge
747 #undef A__NAME__lt
748 #undef A__NAME__gt
749 #undef A__NAME__le
750 #undef A__NAME_PC__eq
751 #undef A__NAME_PC__ne
752 #undef A__NAME_PC__cs
753 #undef A__NAME_PC__cc
754 #undef A__NAME_PC__mi
755 #undef A__NAME_PC__pl
756 #undef A__NAME_PC__vs
757 #undef A__NAME_PC__vc
758 #undef A__NAME_PC__hi
759 #undef A__NAME_PC__ls
760 #undef A__NAME_PC__ge
761 #undef A__NAME_PC__lt
762 #undef A__NAME_PC__gt
763 #undef A__NAME_PC__le
764 #undef A__NAME__general
765 #undef A__NAME_PC
766 #undef A__NAME
767 #define A__NAME__general arm_instr_load_w0_unsigned_halfword_u1_p0_imm__general
768 #define A__NAME arm_instr_load_w0_unsigned_halfword_u1_p0_imm
769 #define A__NAME__eq arm_instr_load_w0_unsigned_halfword_u1_p0_imm__eq
770 #define A__NAME__ne arm_instr_load_w0_unsigned_halfword_u1_p0_imm__ne
771 #define A__NAME__cs arm_instr_load_w0_unsigned_halfword_u1_p0_imm__cs
772 #define A__NAME__cc arm_instr_load_w0_unsigned_halfword_u1_p0_imm__cc
773 #define A__NAME__mi arm_instr_load_w0_unsigned_halfword_u1_p0_imm__mi
774 #define A__NAME__pl arm_instr_load_w0_unsigned_halfword_u1_p0_imm__pl
775 #define A__NAME__vs arm_instr_load_w0_unsigned_halfword_u1_p0_imm__vs
776 #define A__NAME__vc arm_instr_load_w0_unsigned_halfword_u1_p0_imm__vc
777 #define A__NAME__hi arm_instr_load_w0_unsigned_halfword_u1_p0_imm__hi
778 #define A__NAME__ls arm_instr_load_w0_unsigned_halfword_u1_p0_imm__ls
779 #define A__NAME__ge arm_instr_load_w0_unsigned_halfword_u1_p0_imm__ge
780 #define A__NAME__lt arm_instr_load_w0_unsigned_halfword_u1_p0_imm__lt
781 #define A__NAME__gt arm_instr_load_w0_unsigned_halfword_u1_p0_imm__gt
782 #define A__NAME__le arm_instr_load_w0_unsigned_halfword_u1_p0_imm__le
783 #define A__NAME_PC arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc
784 #define A__NAME_PC__eq arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__eq
785 #define A__NAME_PC__ne arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__ne
786 #define A__NAME_PC__cs arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__cs
787 #define A__NAME_PC__cc arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__cc
788 #define A__NAME_PC__mi arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__mi
789 #define A__NAME_PC__pl arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__pl
790 #define A__NAME_PC__vs arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__vs
791 #define A__NAME_PC__vc arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__vc
792 #define A__NAME_PC__hi arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__hi
793 #define A__NAME_PC__ls arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__ls
794 #define A__NAME_PC__ge arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__ge
795 #define A__NAME_PC__lt arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__lt
796 #define A__NAME_PC__gt arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__gt
797 #define A__NAME_PC__le arm_instr_load_w0_unsigned_halfword_u1_p0_imm_pc__le
798 #define A__L
799 #define A__H
800 #define A__U
802 #undef A__L
803 #undef A__H
804 #undef A__U
805 #undef A__NAME__eq
806 #undef A__NAME__ne
807 #undef A__NAME__cs
808 #undef A__NAME__cc
809 #undef A__NAME__mi
810 #undef A__NAME__pl
811 #undef A__NAME__vs
812 #undef A__NAME__vc
813 #undef A__NAME__hi
814 #undef A__NAME__ls
815 #undef A__NAME__ge
816 #undef A__NAME__lt
817 #undef A__NAME__gt
818 #undef A__NAME__le
819 #undef A__NAME_PC__eq
820 #undef A__NAME_PC__ne
821 #undef A__NAME_PC__cs
822 #undef A__NAME_PC__cc
823 #undef A__NAME_PC__mi
824 #undef A__NAME_PC__pl
825 #undef A__NAME_PC__vs
826 #undef A__NAME_PC__vc
827 #undef A__NAME_PC__hi
828 #undef A__NAME_PC__ls
829 #undef A__NAME_PC__ge
830 #undef A__NAME_PC__lt
831 #undef A__NAME_PC__gt
832 #undef A__NAME_PC__le
833 #undef A__NAME__general
834 #undef A__NAME_PC
835 #undef A__NAME
836 #define A__NAME__general arm_instr_store_w0_signed_halfword_u1_p0_imm__general
837 #define A__NAME arm_instr_store_w0_signed_halfword_u1_p0_imm
838 #define A__NAME__eq arm_instr_store_w0_signed_halfword_u1_p0_imm__eq
839 #define A__NAME__ne arm_instr_store_w0_signed_halfword_u1_p0_imm__ne
840 #define A__NAME__cs arm_instr_store_w0_signed_halfword_u1_p0_imm__cs
841 #define A__NAME__cc arm_instr_store_w0_signed_halfword_u1_p0_imm__cc
842 #define A__NAME__mi arm_instr_store_w0_signed_halfword_u1_p0_imm__mi
843 #define A__NAME__pl arm_instr_store_w0_signed_halfword_u1_p0_imm__pl
844 #define A__NAME__vs arm_instr_store_w0_signed_halfword_u1_p0_imm__vs
845 #define A__NAME__vc arm_instr_store_w0_signed_halfword_u1_p0_imm__vc
846 #define A__NAME__hi arm_instr_store_w0_signed_halfword_u1_p0_imm__hi
847 #define A__NAME__ls arm_instr_store_w0_signed_halfword_u1_p0_imm__ls
848 #define A__NAME__ge arm_instr_store_w0_signed_halfword_u1_p0_imm__ge
849 #define A__NAME__lt arm_instr_store_w0_signed_halfword_u1_p0_imm__lt
850 #define A__NAME__gt arm_instr_store_w0_signed_halfword_u1_p0_imm__gt
851 #define A__NAME__le arm_instr_store_w0_signed_halfword_u1_p0_imm__le
852 #define A__NAME_PC arm_instr_store_w0_signed_halfword_u1_p0_imm_pc
853 #define A__NAME_PC__eq arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__eq
854 #define A__NAME_PC__ne arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__ne
855 #define A__NAME_PC__cs arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__cs
856 #define A__NAME_PC__cc arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__cc
857 #define A__NAME_PC__mi arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__mi
858 #define A__NAME_PC__pl arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__pl
859 #define A__NAME_PC__vs arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__vs
860 #define A__NAME_PC__vc arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__vc
861 #define A__NAME_PC__hi arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__hi
862 #define A__NAME_PC__ls arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__ls
863 #define A__NAME_PC__ge arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__ge
864 #define A__NAME_PC__lt arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__lt
865 #define A__NAME_PC__gt arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__gt
866 #define A__NAME_PC__le arm_instr_store_w0_signed_halfword_u1_p0_imm_pc__le
867 #define A__SIGNED
868 #define A__H
869 #define A__U
871 #undef A__SIGNED
872 #undef A__H
873 #undef A__U
874 #undef A__NAME__eq
875 #undef A__NAME__ne
876 #undef A__NAME__cs
877 #undef A__NAME__cc
878 #undef A__NAME__mi
879 #undef A__NAME__pl
880 #undef A__NAME__vs
881 #undef A__NAME__vc
882 #undef A__NAME__hi
883 #undef A__NAME__ls
884 #undef A__NAME__ge
885 #undef A__NAME__lt
886 #undef A__NAME__gt
887 #undef A__NAME__le
888 #undef A__NAME_PC__eq
889 #undef A__NAME_PC__ne
890 #undef A__NAME_PC__cs
891 #undef A__NAME_PC__cc
892 #undef A__NAME_PC__mi
893 #undef A__NAME_PC__pl
894 #undef A__NAME_PC__vs
895 #undef A__NAME_PC__vc
896 #undef A__NAME_PC__hi
897 #undef A__NAME_PC__ls
898 #undef A__NAME_PC__ge
899 #undef A__NAME_PC__lt
900 #undef A__NAME_PC__gt
901 #undef A__NAME_PC__le
902 #undef A__NAME__general
903 #undef A__NAME_PC
904 #undef A__NAME
905 #define A__NAME__general arm_instr_load_w0_signed_halfword_u1_p0_imm__general
906 #define A__NAME arm_instr_load_w0_signed_halfword_u1_p0_imm
907 #define A__NAME__eq arm_instr_load_w0_signed_halfword_u1_p0_imm__eq
908 #define A__NAME__ne arm_instr_load_w0_signed_halfword_u1_p0_imm__ne
909 #define A__NAME__cs arm_instr_load_w0_signed_halfword_u1_p0_imm__cs
910 #define A__NAME__cc arm_instr_load_w0_signed_halfword_u1_p0_imm__cc
911 #define A__NAME__mi arm_instr_load_w0_signed_halfword_u1_p0_imm__mi
912 #define A__NAME__pl arm_instr_load_w0_signed_halfword_u1_p0_imm__pl
913 #define A__NAME__vs arm_instr_load_w0_signed_halfword_u1_p0_imm__vs
914 #define A__NAME__vc arm_instr_load_w0_signed_halfword_u1_p0_imm__vc
915 #define A__NAME__hi arm_instr_load_w0_signed_halfword_u1_p0_imm__hi
916 #define A__NAME__ls arm_instr_load_w0_signed_halfword_u1_p0_imm__ls
917 #define A__NAME__ge arm_instr_load_w0_signed_halfword_u1_p0_imm__ge
918 #define A__NAME__lt arm_instr_load_w0_signed_halfword_u1_p0_imm__lt
919 #define A__NAME__gt arm_instr_load_w0_signed_halfword_u1_p0_imm__gt
920 #define A__NAME__le arm_instr_load_w0_signed_halfword_u1_p0_imm__le
921 #define A__NAME_PC arm_instr_load_w0_signed_halfword_u1_p0_imm_pc
922 #define A__NAME_PC__eq arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__eq
923 #define A__NAME_PC__ne arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__ne
924 #define A__NAME_PC__cs arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__cs
925 #define A__NAME_PC__cc arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__cc
926 #define A__NAME_PC__mi arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__mi
927 #define A__NAME_PC__pl arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__pl
928 #define A__NAME_PC__vs arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__vs
929 #define A__NAME_PC__vc arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__vc
930 #define A__NAME_PC__hi arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__hi
931 #define A__NAME_PC__ls arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__ls
932 #define A__NAME_PC__ge arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__ge
933 #define A__NAME_PC__lt arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__lt
934 #define A__NAME_PC__gt arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__gt
935 #define A__NAME_PC__le arm_instr_load_w0_signed_halfword_u1_p0_imm_pc__le
936 #define A__SIGNED
937 #define A__L
938 #define A__H
939 #define A__U
941 #undef A__SIGNED
942 #undef A__L
943 #undef A__H
944 #undef A__U
945 #undef A__NAME__eq
946 #undef A__NAME__ne
947 #undef A__NAME__cs
948 #undef A__NAME__cc
949 #undef A__NAME__mi
950 #undef A__NAME__pl
951 #undef A__NAME__vs
952 #undef A__NAME__vc
953 #undef A__NAME__hi
954 #undef A__NAME__ls
955 #undef A__NAME__ge
956 #undef A__NAME__lt
957 #undef A__NAME__gt
958 #undef A__NAME__le
959 #undef A__NAME_PC__eq
960 #undef A__NAME_PC__ne
961 #undef A__NAME_PC__cs
962 #undef A__NAME_PC__cc
963 #undef A__NAME_PC__mi
964 #undef A__NAME_PC__pl
965 #undef A__NAME_PC__vs
966 #undef A__NAME_PC__vc
967 #undef A__NAME_PC__hi
968 #undef A__NAME_PC__ls
969 #undef A__NAME_PC__ge
970 #undef A__NAME_PC__lt
971 #undef A__NAME_PC__gt
972 #undef A__NAME_PC__le
973 #undef A__NAME__general
974 #undef A__NAME_PC
975 #undef A__NAME
976 #define A__NAME__general arm_instr_store_w0_signed_byte_u1_p0_reg__general
977 #define A__NAME arm_instr_store_w0_signed_byte_u1_p0_reg
978 #define A__NAME__eq arm_instr_store_w0_signed_byte_u1_p0_reg__eq
979 #define A__NAME__ne arm_instr_store_w0_signed_byte_u1_p0_reg__ne
980 #define A__NAME__cs arm_instr_store_w0_signed_byte_u1_p0_reg__cs
981 #define A__NAME__cc arm_instr_store_w0_signed_byte_u1_p0_reg__cc
982 #define A__NAME__mi arm_instr_store_w0_signed_byte_u1_p0_reg__mi
983 #define A__NAME__pl arm_instr_store_w0_signed_byte_u1_p0_reg__pl
984 #define A__NAME__vs arm_instr_store_w0_signed_byte_u1_p0_reg__vs
985 #define A__NAME__vc arm_instr_store_w0_signed_byte_u1_p0_reg__vc
986 #define A__NAME__hi arm_instr_store_w0_signed_byte_u1_p0_reg__hi
987 #define A__NAME__ls arm_instr_store_w0_signed_byte_u1_p0_reg__ls
988 #define A__NAME__ge arm_instr_store_w0_signed_byte_u1_p0_reg__ge
989 #define A__NAME__lt arm_instr_store_w0_signed_byte_u1_p0_reg__lt
990 #define A__NAME__gt arm_instr_store_w0_signed_byte_u1_p0_reg__gt
991 #define A__NAME__le arm_instr_store_w0_signed_byte_u1_p0_reg__le
992 #define A__NAME_PC arm_instr_store_w0_signed_byte_u1_p0_reg_pc
993 #define A__NAME_PC__eq arm_instr_store_w0_signed_byte_u1_p0_reg_pc__eq
994 #define A__NAME_PC__ne arm_instr_store_w0_signed_byte_u1_p0_reg_pc__ne
995 #define A__NAME_PC__cs arm_instr_store_w0_signed_byte_u1_p0_reg_pc__cs
996 #define A__NAME_PC__cc arm_instr_store_w0_signed_byte_u1_p0_reg_pc__cc
997 #define A__NAME_PC__mi arm_instr_store_w0_signed_byte_u1_p0_reg_pc__mi
998 #define A__NAME_PC__pl arm_instr_store_w0_signed_byte_u1_p0_reg_pc__pl
999 #define A__NAME_PC__vs arm_instr_store_w0_signed_byte_u1_p0_reg_pc__vs
1000 #define A__NAME_PC__vc arm_instr_store_w0_signed_byte_u1_p0_reg_pc__vc
1001 #define A__NAME_PC__hi arm_instr_store_w0_signed_byte_u1_p0_reg_pc__hi
1002 #define A__NAME_PC__ls arm_instr_store_w0_signed_byte_u1_p0_reg_pc__ls
1003 #define A__NAME_PC__ge arm_instr_store_w0_signed_byte_u1_p0_reg_pc__ge
1004 #define A__NAME_PC__lt arm_instr_store_w0_signed_byte_u1_p0_reg_pc__lt
1005 #define A__NAME_PC__gt arm_instr_store_w0_signed_byte_u1_p0_reg_pc__gt
1006 #define A__NAME_PC__le arm_instr_store_w0_signed_byte_u1_p0_reg_pc__le
1007 #define A__SIGNED
1008 #define A__B
1009 #define A__U
1010 #define A__REG
1011 #include "cpu_arm_instr_loadstore.cc"
1012 #undef A__SIGNED
1013 #undef A__B
1014 #undef A__U
1015 #undef A__REG
1016 #undef A__NAME__eq
1017 #undef A__NAME__ne
1018 #undef A__NAME__cs
1019 #undef A__NAME__cc
1020 #undef A__NAME__mi
1021 #undef A__NAME__pl
1022 #undef A__NAME__vs
1023 #undef A__NAME__vc
1024 #undef A__NAME__hi
1025 #undef A__NAME__ls
1026 #undef A__NAME__ge
1027 #undef A__NAME__lt
1028 #undef A__NAME__gt
1029 #undef A__NAME__le
1030 #undef A__NAME_PC__eq
1031 #undef A__NAME_PC__ne
1032 #undef A__NAME_PC__cs
1033 #undef A__NAME_PC__cc
1034 #undef A__NAME_PC__mi
1035 #undef A__NAME_PC__pl
1036 #undef A__NAME_PC__vs
1037 #undef A__NAME_PC__vc
1038 #undef A__NAME_PC__hi
1039 #undef A__NAME_PC__ls
1040 #undef A__NAME_PC__ge
1041 #undef A__NAME_PC__lt
1042 #undef A__NAME_PC__gt
1043 #undef A__NAME_PC__le
1044 #undef A__NAME__general
1045 #undef A__NAME_PC
1046 #undef A__NAME
1047 #define A__NAME__general arm_instr_load_w0_signed_byte_u1_p0_reg__general
1048 #define A__NAME arm_instr_load_w0_signed_byte_u1_p0_reg
1049 #define A__NAME__eq arm_instr_load_w0_signed_byte_u1_p0_reg__eq
1050 #define A__NAME__ne arm_instr_load_w0_signed_byte_u1_p0_reg__ne
1051 #define A__NAME__cs arm_instr_load_w0_signed_byte_u1_p0_reg__cs
1052 #define A__NAME__cc arm_instr_load_w0_signed_byte_u1_p0_reg__cc
1053 #define A__NAME__mi arm_instr_load_w0_signed_byte_u1_p0_reg__mi
1054 #define A__NAME__pl arm_instr_load_w0_signed_byte_u1_p0_reg__pl
1055 #define A__NAME__vs arm_instr_load_w0_signed_byte_u1_p0_reg__vs
1056 #define A__NAME__vc arm_instr_load_w0_signed_byte_u1_p0_reg__vc
1057 #define A__NAME__hi arm_instr_load_w0_signed_byte_u1_p0_reg__hi
1058 #define A__NAME__ls arm_instr_load_w0_signed_byte_u1_p0_reg__ls
1059 #define A__NAME__ge arm_instr_load_w0_signed_byte_u1_p0_reg__ge
1060 #define A__NAME__lt arm_instr_load_w0_signed_byte_u1_p0_reg__lt
1061 #define A__NAME__gt arm_instr_load_w0_signed_byte_u1_p0_reg__gt
1062 #define A__NAME__le arm_instr_load_w0_signed_byte_u1_p0_reg__le
1063 #define A__NAME_PC arm_instr_load_w0_signed_byte_u1_p0_reg_pc
1064 #define A__NAME_PC__eq arm_instr_load_w0_signed_byte_u1_p0_reg_pc__eq
1065 #define A__NAME_PC__ne arm_instr_load_w0_signed_byte_u1_p0_reg_pc__ne
1066 #define A__NAME_PC__cs arm_instr_load_w0_signed_byte_u1_p0_reg_pc__cs
1067 #define A__NAME_PC__cc arm_instr_load_w0_signed_byte_u1_p0_reg_pc__cc
1068 #define A__NAME_PC__mi arm_instr_load_w0_signed_byte_u1_p0_reg_pc__mi
1069 #define A__NAME_PC__pl arm_instr_load_w0_signed_byte_u1_p0_reg_pc__pl
1070 #define A__NAME_PC__vs arm_instr_load_w0_signed_byte_u1_p0_reg_pc__vs
1071 #define A__NAME_PC__vc arm_instr_load_w0_signed_byte_u1_p0_reg_pc__vc
1072 #define A__NAME_PC__hi arm_instr_load_w0_signed_byte_u1_p0_reg_pc__hi
1073 #define A__NAME_PC__ls arm_instr_load_w0_signed_byte_u1_p0_reg_pc__ls
1074 #define A__NAME_PC__ge arm_instr_load_w0_signed_byte_u1_p0_reg_pc__ge
1075 #define A__NAME_PC__lt arm_instr_load_w0_signed_byte_u1_p0_reg_pc__lt
1076 #define A__NAME_PC__gt arm_instr_load_w0_signed_byte_u1_p0_reg_pc__gt
1077 #define A__NAME_PC__le arm_instr_load_w0_signed_byte_u1_p0_reg_pc__le
1078 #define A__SIGNED
1079 #define A__L
1080 #define A__B
1081 #define A__U
1082 #define A__REG
1083 #include "cpu_arm_instr_loadstore.cc"
1084 #undef A__SIGNED
1085 #undef A__L
1086 #undef A__B
1087 #undef A__U
1088 #undef A__REG
1089 #undef A__NAME__eq
1090 #undef A__NAME__ne
1091 #undef A__NAME__cs
1092 #undef A__NAME__cc
1093 #undef A__NAME__mi
1094 #undef A__NAME__pl
1095 #undef A__NAME__vs
1096 #undef A__NAME__vc
1097 #undef A__NAME__hi
1098 #undef A__NAME__ls
1099 #undef A__NAME__ge
1100 #undef A__NAME__lt
1101 #undef A__NAME__gt
1102 #undef A__NAME__le
1103 #undef A__NAME_PC__eq
1104 #undef A__NAME_PC__ne
1105 #undef A__NAME_PC__cs
1106 #undef A__NAME_PC__cc
1107 #undef A__NAME_PC__mi
1108 #undef A__NAME_PC__pl
1109 #undef A__NAME_PC__vs
1110 #undef A__NAME_PC__vc
1111 #undef A__NAME_PC__hi
1112 #undef A__NAME_PC__ls
1113 #undef A__NAME_PC__ge
1114 #undef A__NAME_PC__lt
1115 #undef A__NAME_PC__gt
1116 #undef A__NAME_PC__le
1117 #undef A__NAME__general
1118 #undef A__NAME_PC
1119 #undef A__NAME
1120 #define A__NAME__general arm_instr_store_w0_unsigned_halfword_u1_p0_reg__general
1121 #define A__NAME arm_instr_store_w0_unsigned_halfword_u1_p0_reg
1122 #define A__NAME__eq arm_instr_store_w0_unsigned_halfword_u1_p0_reg__eq
1123 #define A__NAME__ne arm_instr_store_w0_unsigned_halfword_u1_p0_reg__ne
1124 #define A__NAME__cs arm_instr_store_w0_unsigned_halfword_u1_p0_reg__cs
1125 #define A__NAME__cc arm_instr_store_w0_unsigned_halfword_u1_p0_reg__cc
1126 #define A__NAME__mi arm_instr_store_w0_unsigned_halfword_u1_p0_reg__mi
1127 #define A__NAME__pl arm_instr_store_w0_unsigned_halfword_u1_p0_reg__pl
1128 #define A__NAME__vs arm_instr_store_w0_unsigned_halfword_u1_p0_reg__vs
1129 #define A__NAME__vc arm_instr_store_w0_unsigned_halfword_u1_p0_reg__vc
1130 #define A__NAME__hi arm_instr_store_w0_unsigned_halfword_u1_p0_reg__hi
1131 #define A__NAME__ls arm_instr_store_w0_unsigned_halfword_u1_p0_reg__ls
1132 #define A__NAME__ge arm_instr_store_w0_unsigned_halfword_u1_p0_reg__ge
1133 #define A__NAME__lt arm_instr_store_w0_unsigned_halfword_u1_p0_reg__lt
1134 #define A__NAME__gt arm_instr_store_w0_unsigned_halfword_u1_p0_reg__gt
1135 #define A__NAME__le arm_instr_store_w0_unsigned_halfword_u1_p0_reg__le
1136 #define A__NAME_PC arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc
1137 #define A__NAME_PC__eq arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__eq
1138 #define A__NAME_PC__ne arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__ne
1139 #define A__NAME_PC__cs arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__cs
1140 #define A__NAME_PC__cc arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__cc
1141 #define A__NAME_PC__mi arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__mi
1142 #define A__NAME_PC__pl arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__pl
1143 #define A__NAME_PC__vs arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__vs
1144 #define A__NAME_PC__vc arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__vc
1145 #define A__NAME_PC__hi arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__hi
1146 #define A__NAME_PC__ls arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__ls
1147 #define A__NAME_PC__ge arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__ge
1148 #define A__NAME_PC__lt arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__lt
1149 #define A__NAME_PC__gt arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__gt
1150 #define A__NAME_PC__le arm_instr_store_w0_unsigned_halfword_u1_p0_reg_pc__le
1151 #define A__H
1152 #define A__U
1153 #define A__REG
1154 #include "cpu_arm_instr_loadstore.cc"
1155 #undef A__H
1156 #undef A__U
1157 #undef A__REG
1158 #undef A__NAME__eq
1159 #undef A__NAME__ne
1160 #undef A__NAME__cs
1161 #undef A__NAME__cc
1162 #undef A__NAME__mi
1163 #undef A__NAME__pl
1164 #undef A__NAME__vs
1165 #undef A__NAME__vc
1166 #undef A__NAME__hi
1167 #undef A__NAME__ls
1168 #undef A__NAME__ge
1169 #undef A__NAME__lt
1170 #undef A__NAME__gt
1171 #undef A__NAME__le
1172 #undef A__NAME_PC__eq
1173 #undef A__NAME_PC__ne
1174 #undef A__NAME_PC__cs
1175 #undef A__NAME_PC__cc
1176 #undef A__NAME_PC__mi
1177 #undef A__NAME_PC__pl
1178 #undef A__NAME_PC__vs
1179 #undef A__NAME_PC__vc
1180 #undef A__NAME_PC__hi
1181 #undef A__NAME_PC__ls
1182 #undef A__NAME_PC__ge
1183 #undef A__NAME_PC__lt
1184 #undef A__NAME_PC__gt
1185 #undef A__NAME_PC__le
1186 #undef A__NAME__general
1187 #undef A__NAME_PC
1188 #undef A__NAME
1189 #define A__NAME__general arm_instr_load_w0_unsigned_halfword_u1_p0_reg__general
1190 #define A__NAME arm_instr_load_w0_unsigned_halfword_u1_p0_reg
1191 #define A__NAME__eq arm_instr_load_w0_unsigned_halfword_u1_p0_reg__eq
1192 #define A__NAME__ne arm_instr_load_w0_unsigned_halfword_u1_p0_reg__ne
1193 #define A__NAME__cs arm_instr_load_w0_unsigned_halfword_u1_p0_reg__cs
1194 #define A__NAME__cc arm_instr_load_w0_unsigned_halfword_u1_p0_reg__cc
1195 #define A__NAME__mi arm_instr_load_w0_unsigned_halfword_u1_p0_reg__mi
1196 #define A__NAME__pl arm_instr_load_w0_unsigned_halfword_u1_p0_reg__pl
1197 #define A__NAME__vs arm_instr_load_w0_unsigned_halfword_u1_p0_reg__vs
1198 #define A__NAME__vc arm_instr_load_w0_unsigned_halfword_u1_p0_reg__vc
1199 #define A__NAME__hi arm_instr_load_w0_unsigned_halfword_u1_p0_reg__hi
1200 #define A__NAME__ls arm_instr_load_w0_unsigned_halfword_u1_p0_reg__ls
1201 #define A__NAME__ge arm_instr_load_w0_unsigned_halfword_u1_p0_reg__ge
1202 #define A__NAME__lt arm_instr_load_w0_unsigned_halfword_u1_p0_reg__lt
1203 #define A__NAME__gt arm_instr_load_w0_unsigned_halfword_u1_p0_reg__gt
1204 #define A__NAME__le arm_instr_load_w0_unsigned_halfword_u1_p0_reg__le
1205 #define A__NAME_PC arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc
1206 #define A__NAME_PC__eq arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__eq
1207 #define A__NAME_PC__ne arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__ne
1208 #define A__NAME_PC__cs arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__cs
1209 #define A__NAME_PC__cc arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__cc
1210 #define A__NAME_PC__mi arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__mi
1211 #define A__NAME_PC__pl arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__pl
1212 #define A__NAME_PC__vs arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__vs
1213 #define A__NAME_PC__vc arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__vc
1214 #define A__NAME_PC__hi arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__hi
1215 #define A__NAME_PC__ls arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__ls
1216 #define A__NAME_PC__ge arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__ge
1217 #define A__NAME_PC__lt arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__lt
1218 #define A__NAME_PC__gt arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__gt
1219 #define A__NAME_PC__le arm_instr_load_w0_unsigned_halfword_u1_p0_reg_pc__le
1220 #define A__L
1221 #define A__H
1222 #define A__U
1223 #define A__REG
1224 #include "cpu_arm_instr_loadstore.cc"
1225 #undef A__L
1226 #undef A__H
1227 #undef A__U
1228 #undef A__REG
1229 #undef A__NAME__eq
1230 #undef A__NAME__ne
1231 #undef A__NAME__cs
1232 #undef A__NAME__cc
1233 #undef A__NAME__mi
1234 #undef A__NAME__pl
1235 #undef A__NAME__vs
1236 #undef A__NAME__vc
1237 #undef A__NAME__hi
1238 #undef A__NAME__ls
1239 #undef A__NAME__ge
1240 #undef A__NAME__lt
1241 #undef A__NAME__gt
1242 #undef A__NAME__le
1243 #undef A__NAME_PC__eq
1244 #undef A__NAME_PC__ne
1245 #undef A__NAME_PC__cs
1246 #undef A__NAME_PC__cc
1247 #undef A__NAME_PC__mi
1248 #undef A__NAME_PC__pl
1249 #undef A__NAME_PC__vs
1250 #undef A__NAME_PC__vc
1251 #undef A__NAME_PC__hi
1252 #undef A__NAME_PC__ls
1253 #undef A__NAME_PC__ge
1254 #undef A__NAME_PC__lt
1255 #undef A__NAME_PC__gt
1256 #undef A__NAME_PC__le
1257 #undef A__NAME__general
1258 #undef A__NAME_PC
1259 #undef A__NAME
1260 #define A__NAME__general arm_instr_store_w0_signed_halfword_u1_p0_reg__general
1261 #define A__NAME arm_instr_store_w0_signed_halfword_u1_p0_reg
1262 #define A__NAME__eq arm_instr_store_w0_signed_halfword_u1_p0_reg__eq
1263 #define A__NAME__ne arm_instr_store_w0_signed_halfword_u1_p0_reg__ne
1264 #define A__NAME__cs arm_instr_store_w0_signed_halfword_u1_p0_reg__cs
1265 #define A__NAME__cc arm_instr_store_w0_signed_halfword_u1_p0_reg__cc
1266 #define A__NAME__mi arm_instr_store_w0_signed_halfword_u1_p0_reg__mi
1267 #define A__NAME__pl arm_instr_store_w0_signed_halfword_u1_p0_reg__pl
1268 #define A__NAME__vs arm_instr_store_w0_signed_halfword_u1_p0_reg__vs
1269 #define A__NAME__vc arm_instr_store_w0_signed_halfword_u1_p0_reg__vc
1270 #define A__NAME__hi arm_instr_store_w0_signed_halfword_u1_p0_reg__hi
1271 #define A__NAME__ls arm_instr_store_w0_signed_halfword_u1_p0_reg__ls
1272 #define A__NAME__ge arm_instr_store_w0_signed_halfword_u1_p0_reg__ge
1273 #define A__NAME__lt arm_instr_store_w0_signed_halfword_u1_p0_reg__lt
1274 #define A__NAME__gt arm_instr_store_w0_signed_halfword_u1_p0_reg__gt
1275 #define A__NAME__le arm_instr_store_w0_signed_halfword_u1_p0_reg__le
1276 #define A__NAME_PC arm_instr_store_w0_signed_halfword_u1_p0_reg_pc
1277 #define A__NAME_PC__eq arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__eq
1278 #define A__NAME_PC__ne arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__ne
1279 #define A__NAME_PC__cs arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__cs
1280 #define A__NAME_PC__cc arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__cc
1281 #define A__NAME_PC__mi arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__mi
1282 #define A__NAME_PC__pl arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__pl
1283 #define A__NAME_PC__vs arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__vs
1284 #define A__NAME_PC__vc arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__vc
1285 #define A__NAME_PC__hi arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__hi
1286 #define A__NAME_PC__ls arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__ls
1287 #define A__NAME_PC__ge arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__ge
1288 #define A__NAME_PC__lt arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__lt
1289 #define A__NAME_PC__gt arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__gt
1290 #define A__NAME_PC__le arm_instr_store_w0_signed_halfword_u1_p0_reg_pc__le
1291 #define A__SIGNED
1292 #define A__H
1293 #define A__U
1294 #define A__REG
1295 #include "cpu_arm_instr_loadstore.cc"
1296 #undef A__SIGNED
1297 #undef A__H
1298 #undef A__U
1299 #undef A__REG
1300 #undef A__NAME__eq
1301 #undef A__NAME__ne
1302 #undef A__NAME__cs
1303 #undef A__NAME__cc
1304 #undef A__NAME__mi
1305 #undef A__NAME__pl
1306 #undef A__NAME__vs
1307 #undef A__NAME__vc
1308 #undef A__NAME__hi
1309 #undef A__NAME__ls
1310 #undef A__NAME__ge
1311 #undef A__NAME__lt
1312 #undef A__NAME__gt
1313 #undef A__NAME__le
1314 #undef A__NAME_PC__eq
1315 #undef A__NAME_PC__ne
1316 #undef A__NAME_PC__cs
1317 #undef A__NAME_PC__cc
1318 #undef A__NAME_PC__mi
1319 #undef A__NAME_PC__pl
1320 #undef A__NAME_PC__vs
1321 #undef A__NAME_PC__vc
1322 #undef A__NAME_PC__hi
1323 #undef A__NAME_PC__ls
1324 #undef A__NAME_PC__ge
1325 #undef A__NAME_PC__lt
1326 #undef A__NAME_PC__gt
1327 #undef A__NAME_PC__le
1328 #undef A__NAME__general
1329 #undef A__NAME_PC
1330 #undef A__NAME
1331 #define A__NAME__general arm_instr_load_w0_signed_halfword_u1_p0_reg__general
1332 #define A__NAME arm_instr_load_w0_signed_halfword_u1_p0_reg
1333 #define A__NAME__eq arm_instr_load_w0_signed_halfword_u1_p0_reg__eq
1334 #define A__NAME__ne arm_instr_load_w0_signed_halfword_u1_p0_reg__ne
1335 #define A__NAME__cs arm_instr_load_w0_signed_halfword_u1_p0_reg__cs
1336 #define A__NAME__cc arm_instr_load_w0_signed_halfword_u1_p0_reg__cc
1337 #define A__NAME__mi arm_instr_load_w0_signed_halfword_u1_p0_reg__mi
1338 #define A__NAME__pl arm_instr_load_w0_signed_halfword_u1_p0_reg__pl
1339 #define A__NAME__vs arm_instr_load_w0_signed_halfword_u1_p0_reg__vs
1340 #define A__NAME__vc arm_instr_load_w0_signed_halfword_u1_p0_reg__vc
1341 #define A__NAME__hi arm_instr_load_w0_signed_halfword_u1_p0_reg__hi
1342 #define A__NAME__ls arm_instr_load_w0_signed_halfword_u1_p0_reg__ls
1343 #define A__NAME__ge arm_instr_load_w0_signed_halfword_u1_p0_reg__ge
1344 #define A__NAME__lt arm_instr_load_w0_signed_halfword_u1_p0_reg__lt
1345 #define A__NAME__gt arm_instr_load_w0_signed_halfword_u1_p0_reg__gt
1346 #define A__NAME__le arm_instr_load_w0_signed_halfword_u1_p0_reg__le
1347 #define A__NAME_PC arm_instr_load_w0_signed_halfword_u1_p0_reg_pc
1348 #define A__NAME_PC__eq arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__eq
1349 #define A__NAME_PC__ne arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__ne
1350 #define A__NAME_PC__cs arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__cs
1351 #define A__NAME_PC__cc arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__cc
1352 #define A__NAME_PC__mi arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__mi
1353 #define A__NAME_PC__pl arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__pl
1354 #define A__NAME_PC__vs arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__vs
1355 #define A__NAME_PC__vc arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__vc
1356 #define A__NAME_PC__hi arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__hi
1357 #define A__NAME_PC__ls arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__ls
1358 #define A__NAME_PC__ge arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__ge
1359 #define A__NAME_PC__lt arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__lt
1360 #define A__NAME_PC__gt arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__gt
1361 #define A__NAME_PC__le arm_instr_load_w0_signed_halfword_u1_p0_reg_pc__le
1362 #define A__SIGNED
1363 #define A__L
1364 #define A__H
1365 #define A__U
1366 #define A__REG
1368 #undef A__SIGNED
1369 #undef A__L
1370 #undef A__H
1371 #undef A__U
1372 #undef A__REG
1373 #undef A__NAME__eq
1374 #undef A__NAME__ne
1375 #undef A__NAME__cs
1376 #undef A__NAME__cc
1377 #undef A__NAME__mi
1378 #undef A__NAME__pl
1379 #undef A__NAME__vs
1380 #undef A__NAME__vc
1381 #undef A__NAME__hi
1382 #undef A__NAME__ls
1383 #undef A__NAME__ge
1384 #undef A__NAME__lt
1385 #undef A__NAME__gt
1386 #undef A__NAME__le
1387 #undef A__NAME_PC__eq
1388 #undef A__NAME_PC__ne
1389 #undef A__NAME_PC__cs
1390 #undef A__NAME_PC__cc
1391 #undef A__NAME_PC__mi
1392 #undef A__NAME_PC__pl
1393 #undef A__NAME_PC__vs
1394 #undef A__NAME_PC__vc
1395 #undef A__NAME_PC__hi
1396 #undef A__NAME_PC__ls
1397 #undef A__NAME_PC__ge
1398 #undef A__NAME_PC__lt
1399 #undef A__NAME_PC__gt
1400 #undef A__NAME_PC__le
1401 #undef A__NAME__general
1402 #undef A__NAME_PC
1403 #undef A__NAME
misc.h
machine.h
arm_instr_nop
void arm_instr_nop(struct cpu *, struct arm_instr_call *)
cpu.h
cpu_arm_instr_loadstore.cc
arm_instr_invalid
void arm_instr_invalid(struct cpu *, struct arm_instr_call *)
arm_pc_to_pointers
void arm_pc_to_pointers(struct cpu *)
cpu
Definition: cpu.h:326
memory.h
quick_pc_to_pointers.h

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