tmp_arm_loadstore_p0_u0_w0.cc Source File
Back to the index.
src
cpus
tmp_arm_loadstore_p0_u0_w0.cc
Go to the documentation of this file.
1
2
/* AUTOMATICALLY GENERATED! Do not edit. */
3
4
#include <stdio.h>
5
#include <stdlib.h>
6
#include "
cpu.h
"
7
#include "
machine.h
"
8
#include "
memory.h
"
9
#include "
misc.h
"
10
#define DYNTRANS_PC_TO_POINTERS arm_pc_to_pointers
11
#include "
quick_pc_to_pointers.h
"
12
#define reg(x) (*((uint32_t *)(x)))
13
extern
void
arm_instr_nop
(
struct
cpu
*,
struct
arm_instr_call *);
14
extern
void
arm_instr_invalid
(
struct
cpu
*,
struct
arm_instr_call *);
15
extern
void
arm_pc_to_pointers
(
struct
cpu
*);
16
#define A__NAME__general arm_instr_store_w0_word_u0_p0_imm__general
17
#define A__NAME arm_instr_store_w0_word_u0_p0_imm
18
#define A__NAME__eq arm_instr_store_w0_word_u0_p0_imm__eq
19
#define A__NAME__ne arm_instr_store_w0_word_u0_p0_imm__ne
20
#define A__NAME__cs arm_instr_store_w0_word_u0_p0_imm__cs
21
#define A__NAME__cc arm_instr_store_w0_word_u0_p0_imm__cc
22
#define A__NAME__mi arm_instr_store_w0_word_u0_p0_imm__mi
23
#define A__NAME__pl arm_instr_store_w0_word_u0_p0_imm__pl
24
#define A__NAME__vs arm_instr_store_w0_word_u0_p0_imm__vs
25
#define A__NAME__vc arm_instr_store_w0_word_u0_p0_imm__vc
26
#define A__NAME__hi arm_instr_store_w0_word_u0_p0_imm__hi
27
#define A__NAME__ls arm_instr_store_w0_word_u0_p0_imm__ls
28
#define A__NAME__ge arm_instr_store_w0_word_u0_p0_imm__ge
29
#define A__NAME__lt arm_instr_store_w0_word_u0_p0_imm__lt
30
#define A__NAME__gt arm_instr_store_w0_word_u0_p0_imm__gt
31
#define A__NAME__le arm_instr_store_w0_word_u0_p0_imm__le
32
#define A__NAME_PC arm_instr_store_w0_word_u0_p0_imm_pc
33
#define A__NAME_PC__eq arm_instr_store_w0_word_u0_p0_imm_pc__eq
34
#define A__NAME_PC__ne arm_instr_store_w0_word_u0_p0_imm_pc__ne
35
#define A__NAME_PC__cs arm_instr_store_w0_word_u0_p0_imm_pc__cs
36
#define A__NAME_PC__cc arm_instr_store_w0_word_u0_p0_imm_pc__cc
37
#define A__NAME_PC__mi arm_instr_store_w0_word_u0_p0_imm_pc__mi
38
#define A__NAME_PC__pl arm_instr_store_w0_word_u0_p0_imm_pc__pl
39
#define A__NAME_PC__vs arm_instr_store_w0_word_u0_p0_imm_pc__vs
40
#define A__NAME_PC__vc arm_instr_store_w0_word_u0_p0_imm_pc__vc
41
#define A__NAME_PC__hi arm_instr_store_w0_word_u0_p0_imm_pc__hi
42
#define A__NAME_PC__ls arm_instr_store_w0_word_u0_p0_imm_pc__ls
43
#define A__NAME_PC__ge arm_instr_store_w0_word_u0_p0_imm_pc__ge
44
#define A__NAME_PC__lt arm_instr_store_w0_word_u0_p0_imm_pc__lt
45
#define A__NAME_PC__gt arm_instr_store_w0_word_u0_p0_imm_pc__gt
46
#define A__NAME_PC__le arm_instr_store_w0_word_u0_p0_imm_pc__le
47
#include "
cpu_arm_instr_loadstore.cc
"
48
#undef A__NAME__eq
49
#undef A__NAME__ne
50
#undef A__NAME__cs
51
#undef A__NAME__cc
52
#undef A__NAME__mi
53
#undef A__NAME__pl
54
#undef A__NAME__vs
55
#undef A__NAME__vc
56
#undef A__NAME__hi
57
#undef A__NAME__ls
58
#undef A__NAME__ge
59
#undef A__NAME__lt
60
#undef A__NAME__gt
61
#undef A__NAME__le
62
#undef A__NAME_PC__eq
63
#undef A__NAME_PC__ne
64
#undef A__NAME_PC__cs
65
#undef A__NAME_PC__cc
66
#undef A__NAME_PC__mi
67
#undef A__NAME_PC__pl
68
#undef A__NAME_PC__vs
69
#undef A__NAME_PC__vc
70
#undef A__NAME_PC__hi
71
#undef A__NAME_PC__ls
72
#undef A__NAME_PC__ge
73
#undef A__NAME_PC__lt
74
#undef A__NAME_PC__gt
75
#undef A__NAME_PC__le
76
#undef A__NAME__general
77
#undef A__NAME_PC
78
#undef A__NAME
79
#define A__NAME__general arm_instr_load_w0_word_u0_p0_imm__general
80
#define A__NAME arm_instr_load_w0_word_u0_p0_imm
81
#define A__NAME__eq arm_instr_load_w0_word_u0_p0_imm__eq
82
#define A__NAME__ne arm_instr_load_w0_word_u0_p0_imm__ne
83
#define A__NAME__cs arm_instr_load_w0_word_u0_p0_imm__cs
84
#define A__NAME__cc arm_instr_load_w0_word_u0_p0_imm__cc
85
#define A__NAME__mi arm_instr_load_w0_word_u0_p0_imm__mi
86
#define A__NAME__pl arm_instr_load_w0_word_u0_p0_imm__pl
87
#define A__NAME__vs arm_instr_load_w0_word_u0_p0_imm__vs
88
#define A__NAME__vc arm_instr_load_w0_word_u0_p0_imm__vc
89
#define A__NAME__hi arm_instr_load_w0_word_u0_p0_imm__hi
90
#define A__NAME__ls arm_instr_load_w0_word_u0_p0_imm__ls
91
#define A__NAME__ge arm_instr_load_w0_word_u0_p0_imm__ge
92
#define A__NAME__lt arm_instr_load_w0_word_u0_p0_imm__lt
93
#define A__NAME__gt arm_instr_load_w0_word_u0_p0_imm__gt
94
#define A__NAME__le arm_instr_load_w0_word_u0_p0_imm__le
95
#define A__NAME_PC arm_instr_load_w0_word_u0_p0_imm_pc
96
#define A__NAME_PC__eq arm_instr_load_w0_word_u0_p0_imm_pc__eq
97
#define A__NAME_PC__ne arm_instr_load_w0_word_u0_p0_imm_pc__ne
98
#define A__NAME_PC__cs arm_instr_load_w0_word_u0_p0_imm_pc__cs
99
#define A__NAME_PC__cc arm_instr_load_w0_word_u0_p0_imm_pc__cc
100
#define A__NAME_PC__mi arm_instr_load_w0_word_u0_p0_imm_pc__mi
101
#define A__NAME_PC__pl arm_instr_load_w0_word_u0_p0_imm_pc__pl
102
#define A__NAME_PC__vs arm_instr_load_w0_word_u0_p0_imm_pc__vs
103
#define A__NAME_PC__vc arm_instr_load_w0_word_u0_p0_imm_pc__vc
104
#define A__NAME_PC__hi arm_instr_load_w0_word_u0_p0_imm_pc__hi
105
#define A__NAME_PC__ls arm_instr_load_w0_word_u0_p0_imm_pc__ls
106
#define A__NAME_PC__ge arm_instr_load_w0_word_u0_p0_imm_pc__ge
107
#define A__NAME_PC__lt arm_instr_load_w0_word_u0_p0_imm_pc__lt
108
#define A__NAME_PC__gt arm_instr_load_w0_word_u0_p0_imm_pc__gt
109
#define A__NAME_PC__le arm_instr_load_w0_word_u0_p0_imm_pc__le
110
#define A__L
111
#include "
cpu_arm_instr_loadstore.cc
"
112
#undef A__L
113
#undef A__NAME__eq
114
#undef A__NAME__ne
115
#undef A__NAME__cs
116
#undef A__NAME__cc
117
#undef A__NAME__mi
118
#undef A__NAME__pl
119
#undef A__NAME__vs
120
#undef A__NAME__vc
121
#undef A__NAME__hi
122
#undef A__NAME__ls
123
#undef A__NAME__ge
124
#undef A__NAME__lt
125
#undef A__NAME__gt
126
#undef A__NAME__le
127
#undef A__NAME_PC__eq
128
#undef A__NAME_PC__ne
129
#undef A__NAME_PC__cs
130
#undef A__NAME_PC__cc
131
#undef A__NAME_PC__mi
132
#undef A__NAME_PC__pl
133
#undef A__NAME_PC__vs
134
#undef A__NAME_PC__vc
135
#undef A__NAME_PC__hi
136
#undef A__NAME_PC__ls
137
#undef A__NAME_PC__ge
138
#undef A__NAME_PC__lt
139
#undef A__NAME_PC__gt
140
#undef A__NAME_PC__le
141
#undef A__NAME__general
142
#undef A__NAME_PC
143
#undef A__NAME
144
#define A__NAME__general arm_instr_store_w0_byte_u0_p0_imm__general
145
#define A__NAME arm_instr_store_w0_byte_u0_p0_imm
146
#define A__NAME__eq arm_instr_store_w0_byte_u0_p0_imm__eq
147
#define A__NAME__ne arm_instr_store_w0_byte_u0_p0_imm__ne
148
#define A__NAME__cs arm_instr_store_w0_byte_u0_p0_imm__cs
149
#define A__NAME__cc arm_instr_store_w0_byte_u0_p0_imm__cc
150
#define A__NAME__mi arm_instr_store_w0_byte_u0_p0_imm__mi
151
#define A__NAME__pl arm_instr_store_w0_byte_u0_p0_imm__pl
152
#define A__NAME__vs arm_instr_store_w0_byte_u0_p0_imm__vs
153
#define A__NAME__vc arm_instr_store_w0_byte_u0_p0_imm__vc
154
#define A__NAME__hi arm_instr_store_w0_byte_u0_p0_imm__hi
155
#define A__NAME__ls arm_instr_store_w0_byte_u0_p0_imm__ls
156
#define A__NAME__ge arm_instr_store_w0_byte_u0_p0_imm__ge
157
#define A__NAME__lt arm_instr_store_w0_byte_u0_p0_imm__lt
158
#define A__NAME__gt arm_instr_store_w0_byte_u0_p0_imm__gt
159
#define A__NAME__le arm_instr_store_w0_byte_u0_p0_imm__le
160
#define A__NAME_PC arm_instr_store_w0_byte_u0_p0_imm_pc
161
#define A__NAME_PC__eq arm_instr_store_w0_byte_u0_p0_imm_pc__eq
162
#define A__NAME_PC__ne arm_instr_store_w0_byte_u0_p0_imm_pc__ne
163
#define A__NAME_PC__cs arm_instr_store_w0_byte_u0_p0_imm_pc__cs
164
#define A__NAME_PC__cc arm_instr_store_w0_byte_u0_p0_imm_pc__cc
165
#define A__NAME_PC__mi arm_instr_store_w0_byte_u0_p0_imm_pc__mi
166
#define A__NAME_PC__pl arm_instr_store_w0_byte_u0_p0_imm_pc__pl
167
#define A__NAME_PC__vs arm_instr_store_w0_byte_u0_p0_imm_pc__vs
168
#define A__NAME_PC__vc arm_instr_store_w0_byte_u0_p0_imm_pc__vc
169
#define A__NAME_PC__hi arm_instr_store_w0_byte_u0_p0_imm_pc__hi
170
#define A__NAME_PC__ls arm_instr_store_w0_byte_u0_p0_imm_pc__ls
171
#define A__NAME_PC__ge arm_instr_store_w0_byte_u0_p0_imm_pc__ge
172
#define A__NAME_PC__lt arm_instr_store_w0_byte_u0_p0_imm_pc__lt
173
#define A__NAME_PC__gt arm_instr_store_w0_byte_u0_p0_imm_pc__gt
174
#define A__NAME_PC__le arm_instr_store_w0_byte_u0_p0_imm_pc__le
175
#define A__B
176
#include "
cpu_arm_instr_loadstore.cc
"
177
#undef A__B
178
#undef A__NAME__eq
179
#undef A__NAME__ne
180
#undef A__NAME__cs
181
#undef A__NAME__cc
182
#undef A__NAME__mi
183
#undef A__NAME__pl
184
#undef A__NAME__vs
185
#undef A__NAME__vc
186
#undef A__NAME__hi
187
#undef A__NAME__ls
188
#undef A__NAME__ge
189
#undef A__NAME__lt
190
#undef A__NAME__gt
191
#undef A__NAME__le
192
#undef A__NAME_PC__eq
193
#undef A__NAME_PC__ne
194
#undef A__NAME_PC__cs
195
#undef A__NAME_PC__cc
196
#undef A__NAME_PC__mi
197
#undef A__NAME_PC__pl
198
#undef A__NAME_PC__vs
199
#undef A__NAME_PC__vc
200
#undef A__NAME_PC__hi
201
#undef A__NAME_PC__ls
202
#undef A__NAME_PC__ge
203
#undef A__NAME_PC__lt
204
#undef A__NAME_PC__gt
205
#undef A__NAME_PC__le
206
#undef A__NAME__general
207
#undef A__NAME_PC
208
#undef A__NAME
209
#define A__NAME__general arm_instr_load_w0_byte_u0_p0_imm__general
210
#define A__NAME arm_instr_load_w0_byte_u0_p0_imm
211
#define A__NAME__eq arm_instr_load_w0_byte_u0_p0_imm__eq
212
#define A__NAME__ne arm_instr_load_w0_byte_u0_p0_imm__ne
213
#define A__NAME__cs arm_instr_load_w0_byte_u0_p0_imm__cs
214
#define A__NAME__cc arm_instr_load_w0_byte_u0_p0_imm__cc
215
#define A__NAME__mi arm_instr_load_w0_byte_u0_p0_imm__mi
216
#define A__NAME__pl arm_instr_load_w0_byte_u0_p0_imm__pl
217
#define A__NAME__vs arm_instr_load_w0_byte_u0_p0_imm__vs
218
#define A__NAME__vc arm_instr_load_w0_byte_u0_p0_imm__vc
219
#define A__NAME__hi arm_instr_load_w0_byte_u0_p0_imm__hi
220
#define A__NAME__ls arm_instr_load_w0_byte_u0_p0_imm__ls
221
#define A__NAME__ge arm_instr_load_w0_byte_u0_p0_imm__ge
222
#define A__NAME__lt arm_instr_load_w0_byte_u0_p0_imm__lt
223
#define A__NAME__gt arm_instr_load_w0_byte_u0_p0_imm__gt
224
#define A__NAME__le arm_instr_load_w0_byte_u0_p0_imm__le
225
#define A__NAME_PC arm_instr_load_w0_byte_u0_p0_imm_pc
226
#define A__NAME_PC__eq arm_instr_load_w0_byte_u0_p0_imm_pc__eq
227
#define A__NAME_PC__ne arm_instr_load_w0_byte_u0_p0_imm_pc__ne
228
#define A__NAME_PC__cs arm_instr_load_w0_byte_u0_p0_imm_pc__cs
229
#define A__NAME_PC__cc arm_instr_load_w0_byte_u0_p0_imm_pc__cc
230
#define A__NAME_PC__mi arm_instr_load_w0_byte_u0_p0_imm_pc__mi
231
#define A__NAME_PC__pl arm_instr_load_w0_byte_u0_p0_imm_pc__pl
232
#define A__NAME_PC__vs arm_instr_load_w0_byte_u0_p0_imm_pc__vs
233
#define A__NAME_PC__vc arm_instr_load_w0_byte_u0_p0_imm_pc__vc
234
#define A__NAME_PC__hi arm_instr_load_w0_byte_u0_p0_imm_pc__hi
235
#define A__NAME_PC__ls arm_instr_load_w0_byte_u0_p0_imm_pc__ls
236
#define A__NAME_PC__ge arm_instr_load_w0_byte_u0_p0_imm_pc__ge
237
#define A__NAME_PC__lt arm_instr_load_w0_byte_u0_p0_imm_pc__lt
238
#define A__NAME_PC__gt arm_instr_load_w0_byte_u0_p0_imm_pc__gt
239
#define A__NAME_PC__le arm_instr_load_w0_byte_u0_p0_imm_pc__le
240
#define A__L
241
#define A__B
242
#include "
cpu_arm_instr_loadstore.cc
"
243
#undef A__L
244
#undef A__B
245
#undef A__NAME__eq
246
#undef A__NAME__ne
247
#undef A__NAME__cs
248
#undef A__NAME__cc
249
#undef A__NAME__mi
250
#undef A__NAME__pl
251
#undef A__NAME__vs
252
#undef A__NAME__vc
253
#undef A__NAME__hi
254
#undef A__NAME__ls
255
#undef A__NAME__ge
256
#undef A__NAME__lt
257
#undef A__NAME__gt
258
#undef A__NAME__le
259
#undef A__NAME_PC__eq
260
#undef A__NAME_PC__ne
261
#undef A__NAME_PC__cs
262
#undef A__NAME_PC__cc
263
#undef A__NAME_PC__mi
264
#undef A__NAME_PC__pl
265
#undef A__NAME_PC__vs
266
#undef A__NAME_PC__vc
267
#undef A__NAME_PC__hi
268
#undef A__NAME_PC__ls
269
#undef A__NAME_PC__ge
270
#undef A__NAME_PC__lt
271
#undef A__NAME_PC__gt
272
#undef A__NAME_PC__le
273
#undef A__NAME__general
274
#undef A__NAME_PC
275
#undef A__NAME
276
#define A__NAME__general arm_instr_store_w0_word_u0_p0_reg__general
277
#define A__NAME arm_instr_store_w0_word_u0_p0_reg
278
#define A__NAME__eq arm_instr_store_w0_word_u0_p0_reg__eq
279
#define A__NAME__ne arm_instr_store_w0_word_u0_p0_reg__ne
280
#define A__NAME__cs arm_instr_store_w0_word_u0_p0_reg__cs
281
#define A__NAME__cc arm_instr_store_w0_word_u0_p0_reg__cc
282
#define A__NAME__mi arm_instr_store_w0_word_u0_p0_reg__mi
283
#define A__NAME__pl arm_instr_store_w0_word_u0_p0_reg__pl
284
#define A__NAME__vs arm_instr_store_w0_word_u0_p0_reg__vs
285
#define A__NAME__vc arm_instr_store_w0_word_u0_p0_reg__vc
286
#define A__NAME__hi arm_instr_store_w0_word_u0_p0_reg__hi
287
#define A__NAME__ls arm_instr_store_w0_word_u0_p0_reg__ls
288
#define A__NAME__ge arm_instr_store_w0_word_u0_p0_reg__ge
289
#define A__NAME__lt arm_instr_store_w0_word_u0_p0_reg__lt
290
#define A__NAME__gt arm_instr_store_w0_word_u0_p0_reg__gt
291
#define A__NAME__le arm_instr_store_w0_word_u0_p0_reg__le
292
#define A__NAME_PC arm_instr_store_w0_word_u0_p0_reg_pc
293
#define A__NAME_PC__eq arm_instr_store_w0_word_u0_p0_reg_pc__eq
294
#define A__NAME_PC__ne arm_instr_store_w0_word_u0_p0_reg_pc__ne
295
#define A__NAME_PC__cs arm_instr_store_w0_word_u0_p0_reg_pc__cs
296
#define A__NAME_PC__cc arm_instr_store_w0_word_u0_p0_reg_pc__cc
297
#define A__NAME_PC__mi arm_instr_store_w0_word_u0_p0_reg_pc__mi
298
#define A__NAME_PC__pl arm_instr_store_w0_word_u0_p0_reg_pc__pl
299
#define A__NAME_PC__vs arm_instr_store_w0_word_u0_p0_reg_pc__vs
300
#define A__NAME_PC__vc arm_instr_store_w0_word_u0_p0_reg_pc__vc
301
#define A__NAME_PC__hi arm_instr_store_w0_word_u0_p0_reg_pc__hi
302
#define A__NAME_PC__ls arm_instr_store_w0_word_u0_p0_reg_pc__ls
303
#define A__NAME_PC__ge arm_instr_store_w0_word_u0_p0_reg_pc__ge
304
#define A__NAME_PC__lt arm_instr_store_w0_word_u0_p0_reg_pc__lt
305
#define A__NAME_PC__gt arm_instr_store_w0_word_u0_p0_reg_pc__gt
306
#define A__NAME_PC__le arm_instr_store_w0_word_u0_p0_reg_pc__le
307
#define A__REG
308
#include "
cpu_arm_instr_loadstore.cc
"
309
#undef A__REG
310
#undef A__NAME__eq
311
#undef A__NAME__ne
312
#undef A__NAME__cs
313
#undef A__NAME__cc
314
#undef A__NAME__mi
315
#undef A__NAME__pl
316
#undef A__NAME__vs
317
#undef A__NAME__vc
318
#undef A__NAME__hi
319
#undef A__NAME__ls
320
#undef A__NAME__ge
321
#undef A__NAME__lt
322
#undef A__NAME__gt
323
#undef A__NAME__le
324
#undef A__NAME_PC__eq
325
#undef A__NAME_PC__ne
326
#undef A__NAME_PC__cs
327
#undef A__NAME_PC__cc
328
#undef A__NAME_PC__mi
329
#undef A__NAME_PC__pl
330
#undef A__NAME_PC__vs
331
#undef A__NAME_PC__vc
332
#undef A__NAME_PC__hi
333
#undef A__NAME_PC__ls
334
#undef A__NAME_PC__ge
335
#undef A__NAME_PC__lt
336
#undef A__NAME_PC__gt
337
#undef A__NAME_PC__le
338
#undef A__NAME__general
339
#undef A__NAME_PC
340
#undef A__NAME
341
#define A__NAME__general arm_instr_load_w0_word_u0_p0_reg__general
342
#define A__NAME arm_instr_load_w0_word_u0_p0_reg
343
#define A__NAME__eq arm_instr_load_w0_word_u0_p0_reg__eq
344
#define A__NAME__ne arm_instr_load_w0_word_u0_p0_reg__ne
345
#define A__NAME__cs arm_instr_load_w0_word_u0_p0_reg__cs
346
#define A__NAME__cc arm_instr_load_w0_word_u0_p0_reg__cc
347
#define A__NAME__mi arm_instr_load_w0_word_u0_p0_reg__mi
348
#define A__NAME__pl arm_instr_load_w0_word_u0_p0_reg__pl
349
#define A__NAME__vs arm_instr_load_w0_word_u0_p0_reg__vs
350
#define A__NAME__vc arm_instr_load_w0_word_u0_p0_reg__vc
351
#define A__NAME__hi arm_instr_load_w0_word_u0_p0_reg__hi
352
#define A__NAME__ls arm_instr_load_w0_word_u0_p0_reg__ls
353
#define A__NAME__ge arm_instr_load_w0_word_u0_p0_reg__ge
354
#define A__NAME__lt arm_instr_load_w0_word_u0_p0_reg__lt
355
#define A__NAME__gt arm_instr_load_w0_word_u0_p0_reg__gt
356
#define A__NAME__le arm_instr_load_w0_word_u0_p0_reg__le
357
#define A__NAME_PC arm_instr_load_w0_word_u0_p0_reg_pc
358
#define A__NAME_PC__eq arm_instr_load_w0_word_u0_p0_reg_pc__eq
359
#define A__NAME_PC__ne arm_instr_load_w0_word_u0_p0_reg_pc__ne
360
#define A__NAME_PC__cs arm_instr_load_w0_word_u0_p0_reg_pc__cs
361
#define A__NAME_PC__cc arm_instr_load_w0_word_u0_p0_reg_pc__cc
362
#define A__NAME_PC__mi arm_instr_load_w0_word_u0_p0_reg_pc__mi
363
#define A__NAME_PC__pl arm_instr_load_w0_word_u0_p0_reg_pc__pl
364
#define A__NAME_PC__vs arm_instr_load_w0_word_u0_p0_reg_pc__vs
365
#define A__NAME_PC__vc arm_instr_load_w0_word_u0_p0_reg_pc__vc
366
#define A__NAME_PC__hi arm_instr_load_w0_word_u0_p0_reg_pc__hi
367
#define A__NAME_PC__ls arm_instr_load_w0_word_u0_p0_reg_pc__ls
368
#define A__NAME_PC__ge arm_instr_load_w0_word_u0_p0_reg_pc__ge
369
#define A__NAME_PC__lt arm_instr_load_w0_word_u0_p0_reg_pc__lt
370
#define A__NAME_PC__gt arm_instr_load_w0_word_u0_p0_reg_pc__gt
371
#define A__NAME_PC__le arm_instr_load_w0_word_u0_p0_reg_pc__le
372
#define A__L
373
#define A__REG
374
#include "
cpu_arm_instr_loadstore.cc
"
375
#undef A__L
376
#undef A__REG
377
#undef A__NAME__eq
378
#undef A__NAME__ne
379
#undef A__NAME__cs
380
#undef A__NAME__cc
381
#undef A__NAME__mi
382
#undef A__NAME__pl
383
#undef A__NAME__vs
384
#undef A__NAME__vc
385
#undef A__NAME__hi
386
#undef A__NAME__ls
387
#undef A__NAME__ge
388
#undef A__NAME__lt
389
#undef A__NAME__gt
390
#undef A__NAME__le
391
#undef A__NAME_PC__eq
392
#undef A__NAME_PC__ne
393
#undef A__NAME_PC__cs
394
#undef A__NAME_PC__cc
395
#undef A__NAME_PC__mi
396
#undef A__NAME_PC__pl
397
#undef A__NAME_PC__vs
398
#undef A__NAME_PC__vc
399
#undef A__NAME_PC__hi
400
#undef A__NAME_PC__ls
401
#undef A__NAME_PC__ge
402
#undef A__NAME_PC__lt
403
#undef A__NAME_PC__gt
404
#undef A__NAME_PC__le
405
#undef A__NAME__general
406
#undef A__NAME_PC
407
#undef A__NAME
408
#define A__NAME__general arm_instr_store_w0_byte_u0_p0_reg__general
409
#define A__NAME arm_instr_store_w0_byte_u0_p0_reg
410
#define A__NAME__eq arm_instr_store_w0_byte_u0_p0_reg__eq
411
#define A__NAME__ne arm_instr_store_w0_byte_u0_p0_reg__ne
412
#define A__NAME__cs arm_instr_store_w0_byte_u0_p0_reg__cs
413
#define A__NAME__cc arm_instr_store_w0_byte_u0_p0_reg__cc
414
#define A__NAME__mi arm_instr_store_w0_byte_u0_p0_reg__mi
415
#define A__NAME__pl arm_instr_store_w0_byte_u0_p0_reg__pl
416
#define A__NAME__vs arm_instr_store_w0_byte_u0_p0_reg__vs
417
#define A__NAME__vc arm_instr_store_w0_byte_u0_p0_reg__vc
418
#define A__NAME__hi arm_instr_store_w0_byte_u0_p0_reg__hi
419
#define A__NAME__ls arm_instr_store_w0_byte_u0_p0_reg__ls
420
#define A__NAME__ge arm_instr_store_w0_byte_u0_p0_reg__ge
421
#define A__NAME__lt arm_instr_store_w0_byte_u0_p0_reg__lt
422
#define A__NAME__gt arm_instr_store_w0_byte_u0_p0_reg__gt
423
#define A__NAME__le arm_instr_store_w0_byte_u0_p0_reg__le
424
#define A__NAME_PC arm_instr_store_w0_byte_u0_p0_reg_pc
425
#define A__NAME_PC__eq arm_instr_store_w0_byte_u0_p0_reg_pc__eq
426
#define A__NAME_PC__ne arm_instr_store_w0_byte_u0_p0_reg_pc__ne
427
#define A__NAME_PC__cs arm_instr_store_w0_byte_u0_p0_reg_pc__cs
428
#define A__NAME_PC__cc arm_instr_store_w0_byte_u0_p0_reg_pc__cc
429
#define A__NAME_PC__mi arm_instr_store_w0_byte_u0_p0_reg_pc__mi
430
#define A__NAME_PC__pl arm_instr_store_w0_byte_u0_p0_reg_pc__pl
431
#define A__NAME_PC__vs arm_instr_store_w0_byte_u0_p0_reg_pc__vs
432
#define A__NAME_PC__vc arm_instr_store_w0_byte_u0_p0_reg_pc__vc
433
#define A__NAME_PC__hi arm_instr_store_w0_byte_u0_p0_reg_pc__hi
434
#define A__NAME_PC__ls arm_instr_store_w0_byte_u0_p0_reg_pc__ls
435
#define A__NAME_PC__ge arm_instr_store_w0_byte_u0_p0_reg_pc__ge
436
#define A__NAME_PC__lt arm_instr_store_w0_byte_u0_p0_reg_pc__lt
437
#define A__NAME_PC__gt arm_instr_store_w0_byte_u0_p0_reg_pc__gt
438
#define A__NAME_PC__le arm_instr_store_w0_byte_u0_p0_reg_pc__le
439
#define A__B
440
#define A__REG
441
#include "
cpu_arm_instr_loadstore.cc
"
442
#undef A__B
443
#undef A__REG
444
#undef A__NAME__eq
445
#undef A__NAME__ne
446
#undef A__NAME__cs
447
#undef A__NAME__cc
448
#undef A__NAME__mi
449
#undef A__NAME__pl
450
#undef A__NAME__vs
451
#undef A__NAME__vc
452
#undef A__NAME__hi
453
#undef A__NAME__ls
454
#undef A__NAME__ge
455
#undef A__NAME__lt
456
#undef A__NAME__gt
457
#undef A__NAME__le
458
#undef A__NAME_PC__eq
459
#undef A__NAME_PC__ne
460
#undef A__NAME_PC__cs
461
#undef A__NAME_PC__cc
462
#undef A__NAME_PC__mi
463
#undef A__NAME_PC__pl
464
#undef A__NAME_PC__vs
465
#undef A__NAME_PC__vc
466
#undef A__NAME_PC__hi
467
#undef A__NAME_PC__ls
468
#undef A__NAME_PC__ge
469
#undef A__NAME_PC__lt
470
#undef A__NAME_PC__gt
471
#undef A__NAME_PC__le
472
#undef A__NAME__general
473
#undef A__NAME_PC
474
#undef A__NAME
475
#define A__NAME__general arm_instr_load_w0_byte_u0_p0_reg__general
476
#define A__NAME arm_instr_load_w0_byte_u0_p0_reg
477
#define A__NAME__eq arm_instr_load_w0_byte_u0_p0_reg__eq
478
#define A__NAME__ne arm_instr_load_w0_byte_u0_p0_reg__ne
479
#define A__NAME__cs arm_instr_load_w0_byte_u0_p0_reg__cs
480
#define A__NAME__cc arm_instr_load_w0_byte_u0_p0_reg__cc
481
#define A__NAME__mi arm_instr_load_w0_byte_u0_p0_reg__mi
482
#define A__NAME__pl arm_instr_load_w0_byte_u0_p0_reg__pl
483
#define A__NAME__vs arm_instr_load_w0_byte_u0_p0_reg__vs
484
#define A__NAME__vc arm_instr_load_w0_byte_u0_p0_reg__vc
485
#define A__NAME__hi arm_instr_load_w0_byte_u0_p0_reg__hi
486
#define A__NAME__ls arm_instr_load_w0_byte_u0_p0_reg__ls
487
#define A__NAME__ge arm_instr_load_w0_byte_u0_p0_reg__ge
488
#define A__NAME__lt arm_instr_load_w0_byte_u0_p0_reg__lt
489
#define A__NAME__gt arm_instr_load_w0_byte_u0_p0_reg__gt
490
#define A__NAME__le arm_instr_load_w0_byte_u0_p0_reg__le
491
#define A__NAME_PC arm_instr_load_w0_byte_u0_p0_reg_pc
492
#define A__NAME_PC__eq arm_instr_load_w0_byte_u0_p0_reg_pc__eq
493
#define A__NAME_PC__ne arm_instr_load_w0_byte_u0_p0_reg_pc__ne
494
#define A__NAME_PC__cs arm_instr_load_w0_byte_u0_p0_reg_pc__cs
495
#define A__NAME_PC__cc arm_instr_load_w0_byte_u0_p0_reg_pc__cc
496
#define A__NAME_PC__mi arm_instr_load_w0_byte_u0_p0_reg_pc__mi
497
#define A__NAME_PC__pl arm_instr_load_w0_byte_u0_p0_reg_pc__pl
498
#define A__NAME_PC__vs arm_instr_load_w0_byte_u0_p0_reg_pc__vs
499
#define A__NAME_PC__vc arm_instr_load_w0_byte_u0_p0_reg_pc__vc
500
#define A__NAME_PC__hi arm_instr_load_w0_byte_u0_p0_reg_pc__hi
501
#define A__NAME_PC__ls arm_instr_load_w0_byte_u0_p0_reg_pc__ls
502
#define A__NAME_PC__ge arm_instr_load_w0_byte_u0_p0_reg_pc__ge
503
#define A__NAME_PC__lt arm_instr_load_w0_byte_u0_p0_reg_pc__lt
504
#define A__NAME_PC__gt arm_instr_load_w0_byte_u0_p0_reg_pc__gt
505
#define A__NAME_PC__le arm_instr_load_w0_byte_u0_p0_reg_pc__le
506
#define A__L
507
#define A__B
508
#define A__REG
509
#include "
cpu_arm_instr_loadstore.cc
"
510
#undef A__L
511
#undef A__B
512
#undef A__REG
513
#undef A__NAME__eq
514
#undef A__NAME__ne
515
#undef A__NAME__cs
516
#undef A__NAME__cc
517
#undef A__NAME__mi
518
#undef A__NAME__pl
519
#undef A__NAME__vs
520
#undef A__NAME__vc
521
#undef A__NAME__hi
522
#undef A__NAME__ls
523
#undef A__NAME__ge
524
#undef A__NAME__lt
525
#undef A__NAME__gt
526
#undef A__NAME__le
527
#undef A__NAME_PC__eq
528
#undef A__NAME_PC__ne
529
#undef A__NAME_PC__cs
530
#undef A__NAME_PC__cc
531
#undef A__NAME_PC__mi
532
#undef A__NAME_PC__pl
533
#undef A__NAME_PC__vs
534
#undef A__NAME_PC__vc
535
#undef A__NAME_PC__hi
536
#undef A__NAME_PC__ls
537
#undef A__NAME_PC__ge
538
#undef A__NAME_PC__lt
539
#undef A__NAME_PC__gt
540
#undef A__NAME_PC__le
541
#undef A__NAME__general
542
#undef A__NAME_PC
543
#undef A__NAME
544
#define A__NAME__general arm_instr_store_w0_signed_byte_u0_p0_imm__general
545
#define A__NAME arm_instr_store_w0_signed_byte_u0_p0_imm
546
#define A__NAME__eq arm_instr_store_w0_signed_byte_u0_p0_imm__eq
547
#define A__NAME__ne arm_instr_store_w0_signed_byte_u0_p0_imm__ne
548
#define A__NAME__cs arm_instr_store_w0_signed_byte_u0_p0_imm__cs
549
#define A__NAME__cc arm_instr_store_w0_signed_byte_u0_p0_imm__cc
550
#define A__NAME__mi arm_instr_store_w0_signed_byte_u0_p0_imm__mi
551
#define A__NAME__pl arm_instr_store_w0_signed_byte_u0_p0_imm__pl
552
#define A__NAME__vs arm_instr_store_w0_signed_byte_u0_p0_imm__vs
553
#define A__NAME__vc arm_instr_store_w0_signed_byte_u0_p0_imm__vc
554
#define A__NAME__hi arm_instr_store_w0_signed_byte_u0_p0_imm__hi
555
#define A__NAME__ls arm_instr_store_w0_signed_byte_u0_p0_imm__ls
556
#define A__NAME__ge arm_instr_store_w0_signed_byte_u0_p0_imm__ge
557
#define A__NAME__lt arm_instr_store_w0_signed_byte_u0_p0_imm__lt
558
#define A__NAME__gt arm_instr_store_w0_signed_byte_u0_p0_imm__gt
559
#define A__NAME__le arm_instr_store_w0_signed_byte_u0_p0_imm__le
560
#define A__NAME_PC arm_instr_store_w0_signed_byte_u0_p0_imm_pc
561
#define A__NAME_PC__eq arm_instr_store_w0_signed_byte_u0_p0_imm_pc__eq
562
#define A__NAME_PC__ne arm_instr_store_w0_signed_byte_u0_p0_imm_pc__ne
563
#define A__NAME_PC__cs arm_instr_store_w0_signed_byte_u0_p0_imm_pc__cs
564
#define A__NAME_PC__cc arm_instr_store_w0_signed_byte_u0_p0_imm_pc__cc
565
#define A__NAME_PC__mi arm_instr_store_w0_signed_byte_u0_p0_imm_pc__mi
566
#define A__NAME_PC__pl arm_instr_store_w0_signed_byte_u0_p0_imm_pc__pl
567
#define A__NAME_PC__vs arm_instr_store_w0_signed_byte_u0_p0_imm_pc__vs
568
#define A__NAME_PC__vc arm_instr_store_w0_signed_byte_u0_p0_imm_pc__vc
569
#define A__NAME_PC__hi arm_instr_store_w0_signed_byte_u0_p0_imm_pc__hi
570
#define A__NAME_PC__ls arm_instr_store_w0_signed_byte_u0_p0_imm_pc__ls
571
#define A__NAME_PC__ge arm_instr_store_w0_signed_byte_u0_p0_imm_pc__ge
572
#define A__NAME_PC__lt arm_instr_store_w0_signed_byte_u0_p0_imm_pc__lt
573
#define A__NAME_PC__gt arm_instr_store_w0_signed_byte_u0_p0_imm_pc__gt
574
#define A__NAME_PC__le arm_instr_store_w0_signed_byte_u0_p0_imm_pc__le
575
#define A__SIGNED
576
#define A__B
577
#include "
cpu_arm_instr_loadstore.cc
"
578
#undef A__SIGNED
579
#undef A__B
580
#undef A__NAME__eq
581
#undef A__NAME__ne
582
#undef A__NAME__cs
583
#undef A__NAME__cc
584
#undef A__NAME__mi
585
#undef A__NAME__pl
586
#undef A__NAME__vs
587
#undef A__NAME__vc
588
#undef A__NAME__hi
589
#undef A__NAME__ls
590
#undef A__NAME__ge
591
#undef A__NAME__lt
592
#undef A__NAME__gt
593
#undef A__NAME__le
594
#undef A__NAME_PC__eq
595
#undef A__NAME_PC__ne
596
#undef A__NAME_PC__cs
597
#undef A__NAME_PC__cc
598
#undef A__NAME_PC__mi
599
#undef A__NAME_PC__pl
600
#undef A__NAME_PC__vs
601
#undef A__NAME_PC__vc
602
#undef A__NAME_PC__hi
603
#undef A__NAME_PC__ls
604
#undef A__NAME_PC__ge
605
#undef A__NAME_PC__lt
606
#undef A__NAME_PC__gt
607
#undef A__NAME_PC__le
608
#undef A__NAME__general
609
#undef A__NAME_PC
610
#undef A__NAME
611
#define A__NAME__general arm_instr_load_w0_signed_byte_u0_p0_imm__general
612
#define A__NAME arm_instr_load_w0_signed_byte_u0_p0_imm
613
#define A__NAME__eq arm_instr_load_w0_signed_byte_u0_p0_imm__eq
614
#define A__NAME__ne arm_instr_load_w0_signed_byte_u0_p0_imm__ne
615
#define A__NAME__cs arm_instr_load_w0_signed_byte_u0_p0_imm__cs
616
#define A__NAME__cc arm_instr_load_w0_signed_byte_u0_p0_imm__cc
617
#define A__NAME__mi arm_instr_load_w0_signed_byte_u0_p0_imm__mi
618
#define A__NAME__pl arm_instr_load_w0_signed_byte_u0_p0_imm__pl
619
#define A__NAME__vs arm_instr_load_w0_signed_byte_u0_p0_imm__vs
620
#define A__NAME__vc arm_instr_load_w0_signed_byte_u0_p0_imm__vc
621
#define A__NAME__hi arm_instr_load_w0_signed_byte_u0_p0_imm__hi
622
#define A__NAME__ls arm_instr_load_w0_signed_byte_u0_p0_imm__ls
623
#define A__NAME__ge arm_instr_load_w0_signed_byte_u0_p0_imm__ge
624
#define A__NAME__lt arm_instr_load_w0_signed_byte_u0_p0_imm__lt
625
#define A__NAME__gt arm_instr_load_w0_signed_byte_u0_p0_imm__gt
626
#define A__NAME__le arm_instr_load_w0_signed_byte_u0_p0_imm__le
627
#define A__NAME_PC arm_instr_load_w0_signed_byte_u0_p0_imm_pc
628
#define A__NAME_PC__eq arm_instr_load_w0_signed_byte_u0_p0_imm_pc__eq
629
#define A__NAME_PC__ne arm_instr_load_w0_signed_byte_u0_p0_imm_pc__ne
630
#define A__NAME_PC__cs arm_instr_load_w0_signed_byte_u0_p0_imm_pc__cs
631
#define A__NAME_PC__cc arm_instr_load_w0_signed_byte_u0_p0_imm_pc__cc
632
#define A__NAME_PC__mi arm_instr_load_w0_signed_byte_u0_p0_imm_pc__mi
633
#define A__NAME_PC__pl arm_instr_load_w0_signed_byte_u0_p0_imm_pc__pl
634
#define A__NAME_PC__vs arm_instr_load_w0_signed_byte_u0_p0_imm_pc__vs
635
#define A__NAME_PC__vc arm_instr_load_w0_signed_byte_u0_p0_imm_pc__vc
636
#define A__NAME_PC__hi arm_instr_load_w0_signed_byte_u0_p0_imm_pc__hi
637
#define A__NAME_PC__ls arm_instr_load_w0_signed_byte_u0_p0_imm_pc__ls
638
#define A__NAME_PC__ge arm_instr_load_w0_signed_byte_u0_p0_imm_pc__ge
639
#define A__NAME_PC__lt arm_instr_load_w0_signed_byte_u0_p0_imm_pc__lt
640
#define A__NAME_PC__gt arm_instr_load_w0_signed_byte_u0_p0_imm_pc__gt
641
#define A__NAME_PC__le arm_instr_load_w0_signed_byte_u0_p0_imm_pc__le
642
#define A__SIGNED
643
#define A__L
644
#define A__B
645
#include "
cpu_arm_instr_loadstore.cc
"
646
#undef A__SIGNED
647
#undef A__L
648
#undef A__B
649
#undef A__NAME__eq
650
#undef A__NAME__ne
651
#undef A__NAME__cs
652
#undef A__NAME__cc
653
#undef A__NAME__mi
654
#undef A__NAME__pl
655
#undef A__NAME__vs
656
#undef A__NAME__vc
657
#undef A__NAME__hi
658
#undef A__NAME__ls
659
#undef A__NAME__ge
660
#undef A__NAME__lt
661
#undef A__NAME__gt
662
#undef A__NAME__le
663
#undef A__NAME_PC__eq
664
#undef A__NAME_PC__ne
665
#undef A__NAME_PC__cs
666
#undef A__NAME_PC__cc
667
#undef A__NAME_PC__mi
668
#undef A__NAME_PC__pl
669
#undef A__NAME_PC__vs
670
#undef A__NAME_PC__vc
671
#undef A__NAME_PC__hi
672
#undef A__NAME_PC__ls
673
#undef A__NAME_PC__ge
674
#undef A__NAME_PC__lt
675
#undef A__NAME_PC__gt
676
#undef A__NAME_PC__le
677
#undef A__NAME__general
678
#undef A__NAME_PC
679
#undef A__NAME
680
#define A__NAME__general arm_instr_store_w0_unsigned_halfword_u0_p0_imm__general
681
#define A__NAME arm_instr_store_w0_unsigned_halfword_u0_p0_imm
682
#define A__NAME__eq arm_instr_store_w0_unsigned_halfword_u0_p0_imm__eq
683
#define A__NAME__ne arm_instr_store_w0_unsigned_halfword_u0_p0_imm__ne
684
#define A__NAME__cs arm_instr_store_w0_unsigned_halfword_u0_p0_imm__cs
685
#define A__NAME__cc arm_instr_store_w0_unsigned_halfword_u0_p0_imm__cc
686
#define A__NAME__mi arm_instr_store_w0_unsigned_halfword_u0_p0_imm__mi
687
#define A__NAME__pl arm_instr_store_w0_unsigned_halfword_u0_p0_imm__pl
688
#define A__NAME__vs arm_instr_store_w0_unsigned_halfword_u0_p0_imm__vs
689
#define A__NAME__vc arm_instr_store_w0_unsigned_halfword_u0_p0_imm__vc
690
#define A__NAME__hi arm_instr_store_w0_unsigned_halfword_u0_p0_imm__hi
691
#define A__NAME__ls arm_instr_store_w0_unsigned_halfword_u0_p0_imm__ls
692
#define A__NAME__ge arm_instr_store_w0_unsigned_halfword_u0_p0_imm__ge
693
#define A__NAME__lt arm_instr_store_w0_unsigned_halfword_u0_p0_imm__lt
694
#define A__NAME__gt arm_instr_store_w0_unsigned_halfword_u0_p0_imm__gt
695
#define A__NAME__le arm_instr_store_w0_unsigned_halfword_u0_p0_imm__le
696
#define A__NAME_PC arm_instr_store_w0_unsigned_halfword_u0_p0_imm_pc
697
#define A__NAME_PC__eq arm_instr_store_w0_unsigned_halfword_u0_p0_imm_pc__eq
698
#define A__NAME_PC__ne arm_instr_store_w0_unsigned_halfword_u0_p0_imm_pc__ne
699
#define A__NAME_PC__cs arm_instr_store_w0_unsigned_halfword_u0_p0_imm_pc__cs
700
#define A__NAME_PC__cc arm_instr_store_w0_unsigned_halfword_u0_p0_imm_pc__cc
701
#define A__NAME_PC__mi arm_instr_store_w0_unsigned_halfword_u0_p0_imm_pc__mi
702
#define A__NAME_PC__pl arm_instr_store_w0_unsigned_halfword_u0_p0_imm_pc__pl
703
#define A__NAME_PC__vs arm_instr_store_w0_unsigned_halfword_u0_p0_imm_pc__vs
704
#define A__NAME_PC__vc arm_instr_store_w0_unsigned_halfword_u0_p0_imm_pc__vc
705
#define A__NAME_PC__hi arm_instr_store_w0_unsigned_halfword_u0_p0_imm_pc__hi
706
#define A__NAME_PC__ls arm_instr_store_w0_unsigned_halfword_u0_p0_imm_pc__ls
707
#define A__NAME_PC__ge arm_instr_store_w0_unsigned_halfword_u0_p0_imm_pc__ge
708
#define A__NAME_PC__lt arm_instr_store_w0_unsigned_halfword_u0_p0_imm_pc__lt
709
#define A__NAME_PC__gt arm_instr_store_w0_unsigned_halfword_u0_p0_imm_pc__gt
710
#define A__NAME_PC__le arm_instr_store_w0_unsigned_halfword_u0_p0_imm_pc__le
711
#define A__H
712
#include "
cpu_arm_instr_loadstore.cc
"
713
#undef A__H
714
#undef A__NAME__eq
715
#undef A__NAME__ne
716
#undef A__NAME__cs
717
#undef A__NAME__cc
718
#undef A__NAME__mi
719
#undef A__NAME__pl
720
#undef A__NAME__vs
721
#undef A__NAME__vc
722
#undef A__NAME__hi
723
#undef A__NAME__ls
724
#undef A__NAME__ge
725
#undef A__NAME__lt
726
#undef A__NAME__gt
727
#undef A__NAME__le
728
#undef A__NAME_PC__eq
729
#undef A__NAME_PC__ne
730
#undef A__NAME_PC__cs
731
#undef A__NAME_PC__cc
732
#undef A__NAME_PC__mi
733
#undef A__NAME_PC__pl
734
#undef A__NAME_PC__vs
735
#undef A__NAME_PC__vc
736
#undef A__NAME_PC__hi
737
#undef A__NAME_PC__ls
738
#undef A__NAME_PC__ge
739
#undef A__NAME_PC__lt
740
#undef A__NAME_PC__gt
741
#undef A__NAME_PC__le
742
#undef A__NAME__general
743
#undef A__NAME_PC
744
#undef A__NAME
745
#define A__NAME__general arm_instr_load_w0_unsigned_halfword_u0_p0_imm__general
746
#define A__NAME arm_instr_load_w0_unsigned_halfword_u0_p0_imm
747
#define A__NAME__eq arm_instr_load_w0_unsigned_halfword_u0_p0_imm__eq
748
#define A__NAME__ne arm_instr_load_w0_unsigned_halfword_u0_p0_imm__ne
749
#define A__NAME__cs arm_instr_load_w0_unsigned_halfword_u0_p0_imm__cs
750
#define A__NAME__cc arm_instr_load_w0_unsigned_halfword_u0_p0_imm__cc
751
#define A__NAME__mi arm_instr_load_w0_unsigned_halfword_u0_p0_imm__mi
752
#define A__NAME__pl arm_instr_load_w0_unsigned_halfword_u0_p0_imm__pl
753
#define A__NAME__vs arm_instr_load_w0_unsigned_halfword_u0_p0_imm__vs
754
#define A__NAME__vc arm_instr_load_w0_unsigned_halfword_u0_p0_imm__vc
755
#define A__NAME__hi arm_instr_load_w0_unsigned_halfword_u0_p0_imm__hi
756
#define A__NAME__ls arm_instr_load_w0_unsigned_halfword_u0_p0_imm__ls
757
#define A__NAME__ge arm_instr_load_w0_unsigned_halfword_u0_p0_imm__ge
758
#define A__NAME__lt arm_instr_load_w0_unsigned_halfword_u0_p0_imm__lt
759
#define A__NAME__gt arm_instr_load_w0_unsigned_halfword_u0_p0_imm__gt
760
#define A__NAME__le arm_instr_load_w0_unsigned_halfword_u0_p0_imm__le
761
#define A__NAME_PC arm_instr_load_w0_unsigned_halfword_u0_p0_imm_pc
762
#define A__NAME_PC__eq arm_instr_load_w0_unsigned_halfword_u0_p0_imm_pc__eq
763
#define A__NAME_PC__ne arm_instr_load_w0_unsigned_halfword_u0_p0_imm_pc__ne
764
#define A__NAME_PC__cs arm_instr_load_w0_unsigned_halfword_u0_p0_imm_pc__cs
765
#define A__NAME_PC__cc arm_instr_load_w0_unsigned_halfword_u0_p0_imm_pc__cc
766
#define A__NAME_PC__mi arm_instr_load_w0_unsigned_halfword_u0_p0_imm_pc__mi
767
#define A__NAME_PC__pl arm_instr_load_w0_unsigned_halfword_u0_p0_imm_pc__pl
768
#define A__NAME_PC__vs arm_instr_load_w0_unsigned_halfword_u0_p0_imm_pc__vs
769
#define A__NAME_PC__vc arm_instr_load_w0_unsigned_halfword_u0_p0_imm_pc__vc
770
#define A__NAME_PC__hi arm_instr_load_w0_unsigned_halfword_u0_p0_imm_pc__hi
771
#define A__NAME_PC__ls arm_instr_load_w0_unsigned_halfword_u0_p0_imm_pc__ls
772
#define A__NAME_PC__ge arm_instr_load_w0_unsigned_halfword_u0_p0_imm_pc__ge
773
#define A__NAME_PC__lt arm_instr_load_w0_unsigned_halfword_u0_p0_imm_pc__lt
774
#define A__NAME_PC__gt arm_instr_load_w0_unsigned_halfword_u0_p0_imm_pc__gt
775
#define A__NAME_PC__le arm_instr_load_w0_unsigned_halfword_u0_p0_imm_pc__le
776
#define A__L
777
#define A__H
778
#include "
cpu_arm_instr_loadstore.cc
"
779
#undef A__L
780
#undef A__H
781
#undef A__NAME__eq
782
#undef A__NAME__ne
783
#undef A__NAME__cs
784
#undef A__NAME__cc
785
#undef A__NAME__mi
786
#undef A__NAME__pl
787
#undef A__NAME__vs
788
#undef A__NAME__vc
789
#undef A__NAME__hi
790
#undef A__NAME__ls
791
#undef A__NAME__ge
792
#undef A__NAME__lt
793
#undef A__NAME__gt
794
#undef A__NAME__le
795
#undef A__NAME_PC__eq
796
#undef A__NAME_PC__ne
797
#undef A__NAME_PC__cs
798
#undef A__NAME_PC__cc
799
#undef A__NAME_PC__mi
800
#undef A__NAME_PC__pl
801
#undef A__NAME_PC__vs
802
#undef A__NAME_PC__vc
803
#undef A__NAME_PC__hi
804
#undef A__NAME_PC__ls
805
#undef A__NAME_PC__ge
806
#undef A__NAME_PC__lt
807
#undef A__NAME_PC__gt
808
#undef A__NAME_PC__le
809
#undef A__NAME__general
810
#undef A__NAME_PC
811
#undef A__NAME
812
#define A__NAME__general arm_instr_store_w0_signed_halfword_u0_p0_imm__general
813
#define A__NAME arm_instr_store_w0_signed_halfword_u0_p0_imm
814
#define A__NAME__eq arm_instr_store_w0_signed_halfword_u0_p0_imm__eq
815
#define A__NAME__ne arm_instr_store_w0_signed_halfword_u0_p0_imm__ne
816
#define A__NAME__cs arm_instr_store_w0_signed_halfword_u0_p0_imm__cs
817
#define A__NAME__cc arm_instr_store_w0_signed_halfword_u0_p0_imm__cc
818
#define A__NAME__mi arm_instr_store_w0_signed_halfword_u0_p0_imm__mi
819
#define A__NAME__pl arm_instr_store_w0_signed_halfword_u0_p0_imm__pl
820
#define A__NAME__vs arm_instr_store_w0_signed_halfword_u0_p0_imm__vs
821
#define A__NAME__vc arm_instr_store_w0_signed_halfword_u0_p0_imm__vc
822
#define A__NAME__hi arm_instr_store_w0_signed_halfword_u0_p0_imm__hi
823
#define A__NAME__ls arm_instr_store_w0_signed_halfword_u0_p0_imm__ls
824
#define A__NAME__ge arm_instr_store_w0_signed_halfword_u0_p0_imm__ge
825
#define A__NAME__lt arm_instr_store_w0_signed_halfword_u0_p0_imm__lt
826
#define A__NAME__gt arm_instr_store_w0_signed_halfword_u0_p0_imm__gt
827
#define A__NAME__le arm_instr_store_w0_signed_halfword_u0_p0_imm__le
828
#define A__NAME_PC arm_instr_store_w0_signed_halfword_u0_p0_imm_pc
829
#define A__NAME_PC__eq arm_instr_store_w0_signed_halfword_u0_p0_imm_pc__eq
830
#define A__NAME_PC__ne arm_instr_store_w0_signed_halfword_u0_p0_imm_pc__ne
831
#define A__NAME_PC__cs arm_instr_store_w0_signed_halfword_u0_p0_imm_pc__cs
832
#define A__NAME_PC__cc arm_instr_store_w0_signed_halfword_u0_p0_imm_pc__cc
833
#define A__NAME_PC__mi arm_instr_store_w0_signed_halfword_u0_p0_imm_pc__mi
834
#define A__NAME_PC__pl arm_instr_store_w0_signed_halfword_u0_p0_imm_pc__pl
835
#define A__NAME_PC__vs arm_instr_store_w0_signed_halfword_u0_p0_imm_pc__vs
836
#define A__NAME_PC__vc arm_instr_store_w0_signed_halfword_u0_p0_imm_pc__vc
837
#define A__NAME_PC__hi arm_instr_store_w0_signed_halfword_u0_p0_imm_pc__hi
838
#define A__NAME_PC__ls arm_instr_store_w0_signed_halfword_u0_p0_imm_pc__ls
839
#define A__NAME_PC__ge arm_instr_store_w0_signed_halfword_u0_p0_imm_pc__ge
840
#define A__NAME_PC__lt arm_instr_store_w0_signed_halfword_u0_p0_imm_pc__lt
841
#define A__NAME_PC__gt arm_instr_store_w0_signed_halfword_u0_p0_imm_pc__gt
842
#define A__NAME_PC__le arm_instr_store_w0_signed_halfword_u0_p0_imm_pc__le
843
#define A__SIGNED
844
#define A__H
845
#include "
cpu_arm_instr_loadstore.cc
"
846
#undef A__SIGNED
847
#undef A__H
848
#undef A__NAME__eq
849
#undef A__NAME__ne
850
#undef A__NAME__cs
851
#undef A__NAME__cc
852
#undef A__NAME__mi
853
#undef A__NAME__pl
854
#undef A__NAME__vs
855
#undef A__NAME__vc
856
#undef A__NAME__hi
857
#undef A__NAME__ls
858
#undef A__NAME__ge
859
#undef A__NAME__lt
860
#undef A__NAME__gt
861
#undef A__NAME__le
862
#undef A__NAME_PC__eq
863
#undef A__NAME_PC__ne
864
#undef A__NAME_PC__cs
865
#undef A__NAME_PC__cc
866
#undef A__NAME_PC__mi
867
#undef A__NAME_PC__pl
868
#undef A__NAME_PC__vs
869
#undef A__NAME_PC__vc
870
#undef A__NAME_PC__hi
871
#undef A__NAME_PC__ls
872
#undef A__NAME_PC__ge
873
#undef A__NAME_PC__lt
874
#undef A__NAME_PC__gt
875
#undef A__NAME_PC__le
876
#undef A__NAME__general
877
#undef A__NAME_PC
878
#undef A__NAME
879
#define A__NAME__general arm_instr_load_w0_signed_halfword_u0_p0_imm__general
880
#define A__NAME arm_instr_load_w0_signed_halfword_u0_p0_imm
881
#define A__NAME__eq arm_instr_load_w0_signed_halfword_u0_p0_imm__eq
882
#define A__NAME__ne arm_instr_load_w0_signed_halfword_u0_p0_imm__ne
883
#define A__NAME__cs arm_instr_load_w0_signed_halfword_u0_p0_imm__cs
884
#define A__NAME__cc arm_instr_load_w0_signed_halfword_u0_p0_imm__cc
885
#define A__NAME__mi arm_instr_load_w0_signed_halfword_u0_p0_imm__mi
886
#define A__NAME__pl arm_instr_load_w0_signed_halfword_u0_p0_imm__pl
887
#define A__NAME__vs arm_instr_load_w0_signed_halfword_u0_p0_imm__vs
888
#define A__NAME__vc arm_instr_load_w0_signed_halfword_u0_p0_imm__vc
889
#define A__NAME__hi arm_instr_load_w0_signed_halfword_u0_p0_imm__hi
890
#define A__NAME__ls arm_instr_load_w0_signed_halfword_u0_p0_imm__ls
891
#define A__NAME__ge arm_instr_load_w0_signed_halfword_u0_p0_imm__ge
892
#define A__NAME__lt arm_instr_load_w0_signed_halfword_u0_p0_imm__lt
893
#define A__NAME__gt arm_instr_load_w0_signed_halfword_u0_p0_imm__gt
894
#define A__NAME__le arm_instr_load_w0_signed_halfword_u0_p0_imm__le
895
#define A__NAME_PC arm_instr_load_w0_signed_halfword_u0_p0_imm_pc
896
#define A__NAME_PC__eq arm_instr_load_w0_signed_halfword_u0_p0_imm_pc__eq
897
#define A__NAME_PC__ne arm_instr_load_w0_signed_halfword_u0_p0_imm_pc__ne
898
#define A__NAME_PC__cs arm_instr_load_w0_signed_halfword_u0_p0_imm_pc__cs
899
#define A__NAME_PC__cc arm_instr_load_w0_signed_halfword_u0_p0_imm_pc__cc
900
#define A__NAME_PC__mi arm_instr_load_w0_signed_halfword_u0_p0_imm_pc__mi
901
#define A__NAME_PC__pl arm_instr_load_w0_signed_halfword_u0_p0_imm_pc__pl
902
#define A__NAME_PC__vs arm_instr_load_w0_signed_halfword_u0_p0_imm_pc__vs
903
#define A__NAME_PC__vc arm_instr_load_w0_signed_halfword_u0_p0_imm_pc__vc
904
#define A__NAME_PC__hi arm_instr_load_w0_signed_halfword_u0_p0_imm_pc__hi
905
#define A__NAME_PC__ls arm_instr_load_w0_signed_halfword_u0_p0_imm_pc__ls
906
#define A__NAME_PC__ge arm_instr_load_w0_signed_halfword_u0_p0_imm_pc__ge
907
#define A__NAME_PC__lt arm_instr_load_w0_signed_halfword_u0_p0_imm_pc__lt
908
#define A__NAME_PC__gt arm_instr_load_w0_signed_halfword_u0_p0_imm_pc__gt
909
#define A__NAME_PC__le arm_instr_load_w0_signed_halfword_u0_p0_imm_pc__le
910
#define A__SIGNED
911
#define A__L
912
#define A__H
913
#include "
cpu_arm_instr_loadstore.cc
"
914
#undef A__SIGNED
915
#undef A__L
916
#undef A__H
917
#undef A__NAME__eq
918
#undef A__NAME__ne
919
#undef A__NAME__cs
920
#undef A__NAME__cc
921
#undef A__NAME__mi
922
#undef A__NAME__pl
923
#undef A__NAME__vs
924
#undef A__NAME__vc
925
#undef A__NAME__hi
926
#undef A__NAME__ls
927
#undef A__NAME__ge
928
#undef A__NAME__lt
929
#undef A__NAME__gt
930
#undef A__NAME__le
931
#undef A__NAME_PC__eq
932
#undef A__NAME_PC__ne
933
#undef A__NAME_PC__cs
934
#undef A__NAME_PC__cc
935
#undef A__NAME_PC__mi
936
#undef A__NAME_PC__pl
937
#undef A__NAME_PC__vs
938
#undef A__NAME_PC__vc
939
#undef A__NAME_PC__hi
940
#undef A__NAME_PC__ls
941
#undef A__NAME_PC__ge
942
#undef A__NAME_PC__lt
943
#undef A__NAME_PC__gt
944
#undef A__NAME_PC__le
945
#undef A__NAME__general
946
#undef A__NAME_PC
947
#undef A__NAME
948
#define A__NAME__general arm_instr_store_w0_signed_byte_u0_p0_reg__general
949
#define A__NAME arm_instr_store_w0_signed_byte_u0_p0_reg
950
#define A__NAME__eq arm_instr_store_w0_signed_byte_u0_p0_reg__eq
951
#define A__NAME__ne arm_instr_store_w0_signed_byte_u0_p0_reg__ne
952
#define A__NAME__cs arm_instr_store_w0_signed_byte_u0_p0_reg__cs
953
#define A__NAME__cc arm_instr_store_w0_signed_byte_u0_p0_reg__cc
954
#define A__NAME__mi arm_instr_store_w0_signed_byte_u0_p0_reg__mi
955
#define A__NAME__pl arm_instr_store_w0_signed_byte_u0_p0_reg__pl
956
#define A__NAME__vs arm_instr_store_w0_signed_byte_u0_p0_reg__vs
957
#define A__NAME__vc arm_instr_store_w0_signed_byte_u0_p0_reg__vc
958
#define A__NAME__hi arm_instr_store_w0_signed_byte_u0_p0_reg__hi
959
#define A__NAME__ls arm_instr_store_w0_signed_byte_u0_p0_reg__ls
960
#define A__NAME__ge arm_instr_store_w0_signed_byte_u0_p0_reg__ge
961
#define A__NAME__lt arm_instr_store_w0_signed_byte_u0_p0_reg__lt
962
#define A__NAME__gt arm_instr_store_w0_signed_byte_u0_p0_reg__gt
963
#define A__NAME__le arm_instr_store_w0_signed_byte_u0_p0_reg__le
964
#define A__NAME_PC arm_instr_store_w0_signed_byte_u0_p0_reg_pc
965
#define A__NAME_PC__eq arm_instr_store_w0_signed_byte_u0_p0_reg_pc__eq
966
#define A__NAME_PC__ne arm_instr_store_w0_signed_byte_u0_p0_reg_pc__ne
967
#define A__NAME_PC__cs arm_instr_store_w0_signed_byte_u0_p0_reg_pc__cs
968
#define A__NAME_PC__cc arm_instr_store_w0_signed_byte_u0_p0_reg_pc__cc
969
#define A__NAME_PC__mi arm_instr_store_w0_signed_byte_u0_p0_reg_pc__mi
970
#define A__NAME_PC__pl arm_instr_store_w0_signed_byte_u0_p0_reg_pc__pl
971
#define A__NAME_PC__vs arm_instr_store_w0_signed_byte_u0_p0_reg_pc__vs
972
#define A__NAME_PC__vc arm_instr_store_w0_signed_byte_u0_p0_reg_pc__vc
973
#define A__NAME_PC__hi arm_instr_store_w0_signed_byte_u0_p0_reg_pc__hi
974
#define A__NAME_PC__ls arm_instr_store_w0_signed_byte_u0_p0_reg_pc__ls
975
#define A__NAME_PC__ge arm_instr_store_w0_signed_byte_u0_p0_reg_pc__ge
976
#define A__NAME_PC__lt arm_instr_store_w0_signed_byte_u0_p0_reg_pc__lt
977
#define A__NAME_PC__gt arm_instr_store_w0_signed_byte_u0_p0_reg_pc__gt
978
#define A__NAME_PC__le arm_instr_store_w0_signed_byte_u0_p0_reg_pc__le
979
#define A__SIGNED
980
#define A__B
981
#define A__REG
982
#include "
cpu_arm_instr_loadstore.cc
"
983
#undef A__SIGNED
984
#undef A__B
985
#undef A__REG
986
#undef A__NAME__eq
987
#undef A__NAME__ne
988
#undef A__NAME__cs
989
#undef A__NAME__cc
990
#undef A__NAME__mi
991
#undef A__NAME__pl
992
#undef A__NAME__vs
993
#undef A__NAME__vc
994
#undef A__NAME__hi
995
#undef A__NAME__ls
996
#undef A__NAME__ge
997
#undef A__NAME__lt
998
#undef A__NAME__gt
999
#undef A__NAME__le
1000
#undef A__NAME_PC__eq
1001
#undef A__NAME_PC__ne
1002
#undef A__NAME_PC__cs
1003
#undef A__NAME_PC__cc
1004
#undef A__NAME_PC__mi
1005
#undef A__NAME_PC__pl
1006
#undef A__NAME_PC__vs
1007
#undef A__NAME_PC__vc
1008
#undef A__NAME_PC__hi
1009
#undef A__NAME_PC__ls
1010
#undef A__NAME_PC__ge
1011
#undef A__NAME_PC__lt
1012
#undef A__NAME_PC__gt
1013
#undef A__NAME_PC__le
1014
#undef A__NAME__general
1015
#undef A__NAME_PC
1016
#undef A__NAME
1017
#define A__NAME__general arm_instr_load_w0_signed_byte_u0_p0_reg__general
1018
#define A__NAME arm_instr_load_w0_signed_byte_u0_p0_reg
1019
#define A__NAME__eq arm_instr_load_w0_signed_byte_u0_p0_reg__eq
1020
#define A__NAME__ne arm_instr_load_w0_signed_byte_u0_p0_reg__ne
1021
#define A__NAME__cs arm_instr_load_w0_signed_byte_u0_p0_reg__cs
1022
#define A__NAME__cc arm_instr_load_w0_signed_byte_u0_p0_reg__cc
1023
#define A__NAME__mi arm_instr_load_w0_signed_byte_u0_p0_reg__mi
1024
#define A__NAME__pl arm_instr_load_w0_signed_byte_u0_p0_reg__pl
1025
#define A__NAME__vs arm_instr_load_w0_signed_byte_u0_p0_reg__vs
1026
#define A__NAME__vc arm_instr_load_w0_signed_byte_u0_p0_reg__vc
1027
#define A__NAME__hi arm_instr_load_w0_signed_byte_u0_p0_reg__hi
1028
#define A__NAME__ls arm_instr_load_w0_signed_byte_u0_p0_reg__ls
1029
#define A__NAME__ge arm_instr_load_w0_signed_byte_u0_p0_reg__ge
1030
#define A__NAME__lt arm_instr_load_w0_signed_byte_u0_p0_reg__lt
1031
#define A__NAME__gt arm_instr_load_w0_signed_byte_u0_p0_reg__gt
1032
#define A__NAME__le arm_instr_load_w0_signed_byte_u0_p0_reg__le
1033
#define A__NAME_PC arm_instr_load_w0_signed_byte_u0_p0_reg_pc
1034
#define A__NAME_PC__eq arm_instr_load_w0_signed_byte_u0_p0_reg_pc__eq
1035
#define A__NAME_PC__ne arm_instr_load_w0_signed_byte_u0_p0_reg_pc__ne
1036
#define A__NAME_PC__cs arm_instr_load_w0_signed_byte_u0_p0_reg_pc__cs
1037
#define A__NAME_PC__cc arm_instr_load_w0_signed_byte_u0_p0_reg_pc__cc
1038
#define A__NAME_PC__mi arm_instr_load_w0_signed_byte_u0_p0_reg_pc__mi
1039
#define A__NAME_PC__pl arm_instr_load_w0_signed_byte_u0_p0_reg_pc__pl
1040
#define A__NAME_PC__vs arm_instr_load_w0_signed_byte_u0_p0_reg_pc__vs
1041
#define A__NAME_PC__vc arm_instr_load_w0_signed_byte_u0_p0_reg_pc__vc
1042
#define A__NAME_PC__hi arm_instr_load_w0_signed_byte_u0_p0_reg_pc__hi
1043
#define A__NAME_PC__ls arm_instr_load_w0_signed_byte_u0_p0_reg_pc__ls
1044
#define A__NAME_PC__ge arm_instr_load_w0_signed_byte_u0_p0_reg_pc__ge
1045
#define A__NAME_PC__lt arm_instr_load_w0_signed_byte_u0_p0_reg_pc__lt
1046
#define A__NAME_PC__gt arm_instr_load_w0_signed_byte_u0_p0_reg_pc__gt
1047
#define A__NAME_PC__le arm_instr_load_w0_signed_byte_u0_p0_reg_pc__le
1048
#define A__SIGNED
1049
#define A__L
1050
#define A__B
1051
#define A__REG
1052
#include "
cpu_arm_instr_loadstore.cc
"
1053
#undef A__SIGNED
1054
#undef A__L
1055
#undef A__B
1056
#undef A__REG
1057
#undef A__NAME__eq
1058
#undef A__NAME__ne
1059
#undef A__NAME__cs
1060
#undef A__NAME__cc
1061
#undef A__NAME__mi
1062
#undef A__NAME__pl
1063
#undef A__NAME__vs
1064
#undef A__NAME__vc
1065
#undef A__NAME__hi
1066
#undef A__NAME__ls
1067
#undef A__NAME__ge
1068
#undef A__NAME__lt
1069
#undef A__NAME__gt
1070
#undef A__NAME__le
1071
#undef A__NAME_PC__eq
1072
#undef A__NAME_PC__ne
1073
#undef A__NAME_PC__cs
1074
#undef A__NAME_PC__cc
1075
#undef A__NAME_PC__mi
1076
#undef A__NAME_PC__pl
1077
#undef A__NAME_PC__vs
1078
#undef A__NAME_PC__vc
1079
#undef A__NAME_PC__hi
1080
#undef A__NAME_PC__ls
1081
#undef A__NAME_PC__ge
1082
#undef A__NAME_PC__lt
1083
#undef A__NAME_PC__gt
1084
#undef A__NAME_PC__le
1085
#undef A__NAME__general
1086
#undef A__NAME_PC
1087
#undef A__NAME
1088
#define A__NAME__general arm_instr_store_w0_unsigned_halfword_u0_p0_reg__general
1089
#define A__NAME arm_instr_store_w0_unsigned_halfword_u0_p0_reg
1090
#define A__NAME__eq arm_instr_store_w0_unsigned_halfword_u0_p0_reg__eq
1091
#define A__NAME__ne arm_instr_store_w0_unsigned_halfword_u0_p0_reg__ne
1092
#define A__NAME__cs arm_instr_store_w0_unsigned_halfword_u0_p0_reg__cs
1093
#define A__NAME__cc arm_instr_store_w0_unsigned_halfword_u0_p0_reg__cc
1094
#define A__NAME__mi arm_instr_store_w0_unsigned_halfword_u0_p0_reg__mi
1095
#define A__NAME__pl arm_instr_store_w0_unsigned_halfword_u0_p0_reg__pl
1096
#define A__NAME__vs arm_instr_store_w0_unsigned_halfword_u0_p0_reg__vs
1097
#define A__NAME__vc arm_instr_store_w0_unsigned_halfword_u0_p0_reg__vc
1098
#define A__NAME__hi arm_instr_store_w0_unsigned_halfword_u0_p0_reg__hi
1099
#define A__NAME__ls arm_instr_store_w0_unsigned_halfword_u0_p0_reg__ls
1100
#define A__NAME__ge arm_instr_store_w0_unsigned_halfword_u0_p0_reg__ge
1101
#define A__NAME__lt arm_instr_store_w0_unsigned_halfword_u0_p0_reg__lt
1102
#define A__NAME__gt arm_instr_store_w0_unsigned_halfword_u0_p0_reg__gt
1103
#define A__NAME__le arm_instr_store_w0_unsigned_halfword_u0_p0_reg__le
1104
#define A__NAME_PC arm_instr_store_w0_unsigned_halfword_u0_p0_reg_pc
1105
#define A__NAME_PC__eq arm_instr_store_w0_unsigned_halfword_u0_p0_reg_pc__eq
1106
#define A__NAME_PC__ne arm_instr_store_w0_unsigned_halfword_u0_p0_reg_pc__ne
1107
#define A__NAME_PC__cs arm_instr_store_w0_unsigned_halfword_u0_p0_reg_pc__cs
1108
#define A__NAME_PC__cc arm_instr_store_w0_unsigned_halfword_u0_p0_reg_pc__cc
1109
#define A__NAME_PC__mi arm_instr_store_w0_unsigned_halfword_u0_p0_reg_pc__mi
1110
#define A__NAME_PC__pl arm_instr_store_w0_unsigned_halfword_u0_p0_reg_pc__pl
1111
#define A__NAME_PC__vs arm_instr_store_w0_unsigned_halfword_u0_p0_reg_pc__vs
1112
#define A__NAME_PC__vc arm_instr_store_w0_unsigned_halfword_u0_p0_reg_pc__vc
1113
#define A__NAME_PC__hi arm_instr_store_w0_unsigned_halfword_u0_p0_reg_pc__hi
1114
#define A__NAME_PC__ls arm_instr_store_w0_unsigned_halfword_u0_p0_reg_pc__ls
1115
#define A__NAME_PC__ge arm_instr_store_w0_unsigned_halfword_u0_p0_reg_pc__ge
1116
#define A__NAME_PC__lt arm_instr_store_w0_unsigned_halfword_u0_p0_reg_pc__lt
1117
#define A__NAME_PC__gt arm_instr_store_w0_unsigned_halfword_u0_p0_reg_pc__gt
1118
#define A__NAME_PC__le arm_instr_store_w0_unsigned_halfword_u0_p0_reg_pc__le
1119
#define A__H
1120
#define A__REG
1121
#include "
cpu_arm_instr_loadstore.cc
"
1122
#undef A__H
1123
#undef A__REG
1124
#undef A__NAME__eq
1125
#undef A__NAME__ne
1126
#undef A__NAME__cs
1127
#undef A__NAME__cc
1128
#undef A__NAME__mi
1129
#undef A__NAME__pl
1130
#undef A__NAME__vs
1131
#undef A__NAME__vc
1132
#undef A__NAME__hi
1133
#undef A__NAME__ls
1134
#undef A__NAME__ge
1135
#undef A__NAME__lt
1136
#undef A__NAME__gt
1137
#undef A__NAME__le
1138
#undef A__NAME_PC__eq
1139
#undef A__NAME_PC__ne
1140
#undef A__NAME_PC__cs
1141
#undef A__NAME_PC__cc
1142
#undef A__NAME_PC__mi
1143
#undef A__NAME_PC__pl
1144
#undef A__NAME_PC__vs
1145
#undef A__NAME_PC__vc
1146
#undef A__NAME_PC__hi
1147
#undef A__NAME_PC__ls
1148
#undef A__NAME_PC__ge
1149
#undef A__NAME_PC__lt
1150
#undef A__NAME_PC__gt
1151
#undef A__NAME_PC__le
1152
#undef A__NAME__general
1153
#undef A__NAME_PC
1154
#undef A__NAME
1155
#define A__NAME__general arm_instr_load_w0_unsigned_halfword_u0_p0_reg__general
1156
#define A__NAME arm_instr_load_w0_unsigned_halfword_u0_p0_reg
1157
#define A__NAME__eq arm_instr_load_w0_unsigned_halfword_u0_p0_reg__eq
1158
#define A__NAME__ne arm_instr_load_w0_unsigned_halfword_u0_p0_reg__ne
1159
#define A__NAME__cs arm_instr_load_w0_unsigned_halfword_u0_p0_reg__cs
1160
#define A__NAME__cc arm_instr_load_w0_unsigned_halfword_u0_p0_reg__cc
1161
#define A__NAME__mi arm_instr_load_w0_unsigned_halfword_u0_p0_reg__mi
1162
#define A__NAME__pl arm_instr_load_w0_unsigned_halfword_u0_p0_reg__pl
1163
#define A__NAME__vs arm_instr_load_w0_unsigned_halfword_u0_p0_reg__vs
1164
#define A__NAME__vc arm_instr_load_w0_unsigned_halfword_u0_p0_reg__vc
1165
#define A__NAME__hi arm_instr_load_w0_unsigned_halfword_u0_p0_reg__hi
1166
#define A__NAME__ls arm_instr_load_w0_unsigned_halfword_u0_p0_reg__ls
1167
#define A__NAME__ge arm_instr_load_w0_unsigned_halfword_u0_p0_reg__ge
1168
#define A__NAME__lt arm_instr_load_w0_unsigned_halfword_u0_p0_reg__lt
1169
#define A__NAME__gt arm_instr_load_w0_unsigned_halfword_u0_p0_reg__gt
1170
#define A__NAME__le arm_instr_load_w0_unsigned_halfword_u0_p0_reg__le
1171
#define A__NAME_PC arm_instr_load_w0_unsigned_halfword_u0_p0_reg_pc
1172
#define A__NAME_PC__eq arm_instr_load_w0_unsigned_halfword_u0_p0_reg_pc__eq
1173
#define A__NAME_PC__ne arm_instr_load_w0_unsigned_halfword_u0_p0_reg_pc__ne
1174
#define A__NAME_PC__cs arm_instr_load_w0_unsigned_halfword_u0_p0_reg_pc__cs
1175
#define A__NAME_PC__cc arm_instr_load_w0_unsigned_halfword_u0_p0_reg_pc__cc
1176
#define A__NAME_PC__mi arm_instr_load_w0_unsigned_halfword_u0_p0_reg_pc__mi
1177
#define A__NAME_PC__pl arm_instr_load_w0_unsigned_halfword_u0_p0_reg_pc__pl
1178
#define A__NAME_PC__vs arm_instr_load_w0_unsigned_halfword_u0_p0_reg_pc__vs
1179
#define A__NAME_PC__vc arm_instr_load_w0_unsigned_halfword_u0_p0_reg_pc__vc
1180
#define A__NAME_PC__hi arm_instr_load_w0_unsigned_halfword_u0_p0_reg_pc__hi
1181
#define A__NAME_PC__ls arm_instr_load_w0_unsigned_halfword_u0_p0_reg_pc__ls
1182
#define A__NAME_PC__ge arm_instr_load_w0_unsigned_halfword_u0_p0_reg_pc__ge
1183
#define A__NAME_PC__lt arm_instr_load_w0_unsigned_halfword_u0_p0_reg_pc__lt
1184
#define A__NAME_PC__gt arm_instr_load_w0_unsigned_halfword_u0_p0_reg_pc__gt
1185
#define A__NAME_PC__le arm_instr_load_w0_unsigned_halfword_u0_p0_reg_pc__le
1186
#define A__L
1187
#define A__H
1188
#define A__REG
1189
#include "
cpu_arm_instr_loadstore.cc
"
1190
#undef A__L
1191
#undef A__H
1192
#undef A__REG
1193
#undef A__NAME__eq
1194
#undef A__NAME__ne
1195
#undef A__NAME__cs
1196
#undef A__NAME__cc
1197
#undef A__NAME__mi
1198
#undef A__NAME__pl
1199
#undef A__NAME__vs
1200
#undef A__NAME__vc
1201
#undef A__NAME__hi
1202
#undef A__NAME__ls
1203
#undef A__NAME__ge
1204
#undef A__NAME__lt
1205
#undef A__NAME__gt
1206
#undef A__NAME__le
1207
#undef A__NAME_PC__eq
1208
#undef A__NAME_PC__ne
1209
#undef A__NAME_PC__cs
1210
#undef A__NAME_PC__cc
1211
#undef A__NAME_PC__mi
1212
#undef A__NAME_PC__pl
1213
#undef A__NAME_PC__vs
1214
#undef A__NAME_PC__vc
1215
#undef A__NAME_PC__hi
1216
#undef A__NAME_PC__ls
1217
#undef A__NAME_PC__ge
1218
#undef A__NAME_PC__lt
1219
#undef A__NAME_PC__gt
1220
#undef A__NAME_PC__le
1221
#undef A__NAME__general
1222
#undef A__NAME_PC
1223
#undef A__NAME
1224
#define A__NAME__general arm_instr_store_w0_signed_halfword_u0_p0_reg__general
1225
#define A__NAME arm_instr_store_w0_signed_halfword_u0_p0_reg
1226
#define A__NAME__eq arm_instr_store_w0_signed_halfword_u0_p0_reg__eq
1227
#define A__NAME__ne arm_instr_store_w0_signed_halfword_u0_p0_reg__ne
1228
#define A__NAME__cs arm_instr_store_w0_signed_halfword_u0_p0_reg__cs
1229
#define A__NAME__cc arm_instr_store_w0_signed_halfword_u0_p0_reg__cc
1230
#define A__NAME__mi arm_instr_store_w0_signed_halfword_u0_p0_reg__mi
1231
#define A__NAME__pl arm_instr_store_w0_signed_halfword_u0_p0_reg__pl
1232
#define A__NAME__vs arm_instr_store_w0_signed_halfword_u0_p0_reg__vs
1233
#define A__NAME__vc arm_instr_store_w0_signed_halfword_u0_p0_reg__vc
1234
#define A__NAME__hi arm_instr_store_w0_signed_halfword_u0_p0_reg__hi
1235
#define A__NAME__ls arm_instr_store_w0_signed_halfword_u0_p0_reg__ls
1236
#define A__NAME__ge arm_instr_store_w0_signed_halfword_u0_p0_reg__ge
1237
#define A__NAME__lt arm_instr_store_w0_signed_halfword_u0_p0_reg__lt
1238
#define A__NAME__gt arm_instr_store_w0_signed_halfword_u0_p0_reg__gt
1239
#define A__NAME__le arm_instr_store_w0_signed_halfword_u0_p0_reg__le
1240
#define A__NAME_PC arm_instr_store_w0_signed_halfword_u0_p0_reg_pc
1241
#define A__NAME_PC__eq arm_instr_store_w0_signed_halfword_u0_p0_reg_pc__eq
1242
#define A__NAME_PC__ne arm_instr_store_w0_signed_halfword_u0_p0_reg_pc__ne
1243
#define A__NAME_PC__cs arm_instr_store_w0_signed_halfword_u0_p0_reg_pc__cs
1244
#define A__NAME_PC__cc arm_instr_store_w0_signed_halfword_u0_p0_reg_pc__cc
1245
#define A__NAME_PC__mi arm_instr_store_w0_signed_halfword_u0_p0_reg_pc__mi
1246
#define A__NAME_PC__pl arm_instr_store_w0_signed_halfword_u0_p0_reg_pc__pl
1247
#define A__NAME_PC__vs arm_instr_store_w0_signed_halfword_u0_p0_reg_pc__vs
1248
#define A__NAME_PC__vc arm_instr_store_w0_signed_halfword_u0_p0_reg_pc__vc
1249
#define A__NAME_PC__hi arm_instr_store_w0_signed_halfword_u0_p0_reg_pc__hi
1250
#define A__NAME_PC__ls arm_instr_store_w0_signed_halfword_u0_p0_reg_pc__ls
1251
#define A__NAME_PC__ge arm_instr_store_w0_signed_halfword_u0_p0_reg_pc__ge
1252
#define A__NAME_PC__lt arm_instr_store_w0_signed_halfword_u0_p0_reg_pc__lt
1253
#define A__NAME_PC__gt arm_instr_store_w0_signed_halfword_u0_p0_reg_pc__gt
1254
#define A__NAME_PC__le arm_instr_store_w0_signed_halfword_u0_p0_reg_pc__le
1255
#define A__SIGNED
1256
#define A__H
1257
#define A__REG
1258
#include "
cpu_arm_instr_loadstore.cc
"
1259
#undef A__SIGNED
1260
#undef A__H
1261
#undef A__REG
1262
#undef A__NAME__eq
1263
#undef A__NAME__ne
1264
#undef A__NAME__cs
1265
#undef A__NAME__cc
1266
#undef A__NAME__mi
1267
#undef A__NAME__pl
1268
#undef A__NAME__vs
1269
#undef A__NAME__vc
1270
#undef A__NAME__hi
1271
#undef A__NAME__ls
1272
#undef A__NAME__ge
1273
#undef A__NAME__lt
1274
#undef A__NAME__gt
1275
#undef A__NAME__le
1276
#undef A__NAME_PC__eq
1277
#undef A__NAME_PC__ne
1278
#undef A__NAME_PC__cs
1279
#undef A__NAME_PC__cc
1280
#undef A__NAME_PC__mi
1281
#undef A__NAME_PC__pl
1282
#undef A__NAME_PC__vs
1283
#undef A__NAME_PC__vc
1284
#undef A__NAME_PC__hi
1285
#undef A__NAME_PC__ls
1286
#undef A__NAME_PC__ge
1287
#undef A__NAME_PC__lt
1288
#undef A__NAME_PC__gt
1289
#undef A__NAME_PC__le
1290
#undef A__NAME__general
1291
#undef A__NAME_PC
1292
#undef A__NAME
1293
#define A__NAME__general arm_instr_load_w0_signed_halfword_u0_p0_reg__general
1294
#define A__NAME arm_instr_load_w0_signed_halfword_u0_p0_reg
1295
#define A__NAME__eq arm_instr_load_w0_signed_halfword_u0_p0_reg__eq
1296
#define A__NAME__ne arm_instr_load_w0_signed_halfword_u0_p0_reg__ne
1297
#define A__NAME__cs arm_instr_load_w0_signed_halfword_u0_p0_reg__cs
1298
#define A__NAME__cc arm_instr_load_w0_signed_halfword_u0_p0_reg__cc
1299
#define A__NAME__mi arm_instr_load_w0_signed_halfword_u0_p0_reg__mi
1300
#define A__NAME__pl arm_instr_load_w0_signed_halfword_u0_p0_reg__pl
1301
#define A__NAME__vs arm_instr_load_w0_signed_halfword_u0_p0_reg__vs
1302
#define A__NAME__vc arm_instr_load_w0_signed_halfword_u0_p0_reg__vc
1303
#define A__NAME__hi arm_instr_load_w0_signed_halfword_u0_p0_reg__hi
1304
#define A__NAME__ls arm_instr_load_w0_signed_halfword_u0_p0_reg__ls
1305
#define A__NAME__ge arm_instr_load_w0_signed_halfword_u0_p0_reg__ge
1306
#define A__NAME__lt arm_instr_load_w0_signed_halfword_u0_p0_reg__lt
1307
#define A__NAME__gt arm_instr_load_w0_signed_halfword_u0_p0_reg__gt
1308
#define A__NAME__le arm_instr_load_w0_signed_halfword_u0_p0_reg__le
1309
#define A__NAME_PC arm_instr_load_w0_signed_halfword_u0_p0_reg_pc
1310
#define A__NAME_PC__eq arm_instr_load_w0_signed_halfword_u0_p0_reg_pc__eq
1311
#define A__NAME_PC__ne arm_instr_load_w0_signed_halfword_u0_p0_reg_pc__ne
1312
#define A__NAME_PC__cs arm_instr_load_w0_signed_halfword_u0_p0_reg_pc__cs
1313
#define A__NAME_PC__cc arm_instr_load_w0_signed_halfword_u0_p0_reg_pc__cc
1314
#define A__NAME_PC__mi arm_instr_load_w0_signed_halfword_u0_p0_reg_pc__mi
1315
#define A__NAME_PC__pl arm_instr_load_w0_signed_halfword_u0_p0_reg_pc__pl
1316
#define A__NAME_PC__vs arm_instr_load_w0_signed_halfword_u0_p0_reg_pc__vs
1317
#define A__NAME_PC__vc arm_instr_load_w0_signed_halfword_u0_p0_reg_pc__vc
1318
#define A__NAME_PC__hi arm_instr_load_w0_signed_halfword_u0_p0_reg_pc__hi
1319
#define A__NAME_PC__ls arm_instr_load_w0_signed_halfword_u0_p0_reg_pc__ls
1320
#define A__NAME_PC__ge arm_instr_load_w0_signed_halfword_u0_p0_reg_pc__ge
1321
#define A__NAME_PC__lt arm_instr_load_w0_signed_halfword_u0_p0_reg_pc__lt
1322
#define A__NAME_PC__gt arm_instr_load_w0_signed_halfword_u0_p0_reg_pc__gt
1323
#define A__NAME_PC__le arm_instr_load_w0_signed_halfword_u0_p0_reg_pc__le
1324
#define A__SIGNED
1325
#define A__L
1326
#define A__H
1327
#define A__REG
1328
#include "
cpu_arm_instr_loadstore.cc
"
1329
#undef A__SIGNED
1330
#undef A__L
1331
#undef A__H
1332
#undef A__REG
1333
#undef A__NAME__eq
1334
#undef A__NAME__ne
1335
#undef A__NAME__cs
1336
#undef A__NAME__cc
1337
#undef A__NAME__mi
1338
#undef A__NAME__pl
1339
#undef A__NAME__vs
1340
#undef A__NAME__vc
1341
#undef A__NAME__hi
1342
#undef A__NAME__ls
1343
#undef A__NAME__ge
1344
#undef A__NAME__lt
1345
#undef A__NAME__gt
1346
#undef A__NAME__le
1347
#undef A__NAME_PC__eq
1348
#undef A__NAME_PC__ne
1349
#undef A__NAME_PC__cs
1350
#undef A__NAME_PC__cc
1351
#undef A__NAME_PC__mi
1352
#undef A__NAME_PC__pl
1353
#undef A__NAME_PC__vs
1354
#undef A__NAME_PC__vc
1355
#undef A__NAME_PC__hi
1356
#undef A__NAME_PC__ls
1357
#undef A__NAME_PC__ge
1358
#undef A__NAME_PC__lt
1359
#undef A__NAME_PC__gt
1360
#undef A__NAME_PC__le
1361
#undef A__NAME__general
1362
#undef A__NAME_PC
1363
#undef A__NAME
arm_pc_to_pointers
void arm_pc_to_pointers(struct cpu *)
misc.h
machine.h
arm_instr_invalid
void arm_instr_invalid(struct cpu *, struct arm_instr_call *)
cpu.h
cpu_arm_instr_loadstore.cc
cpu
Definition:
cpu.h:326
memory.h
quick_pc_to_pointers.h
arm_instr_nop
void arm_instr_nop(struct cpu *, struct arm_instr_call *)
Generated on Tue Aug 25 2020 19:25:06 for GXemul by
1.8.18