[][src]Module core::arch::arm

🔬 This is a nightly-only experimental API. (stdsimd #27731)
This is supported on ARM only.

Platform-specific intrinsics for the arm platform.

See the module documentation for more details.

Structs

float32x2_tExperimentalARM

ARM-specific 64-bit wide vector of two packed f32.

float32x4_tExperimentalARM

ARM-specific 128-bit wide vector of four packed f32.

int16x2_tExperimentalARM

ARM-specific 32-bit wide vector of two packed i16.

int16x4_tExperimentalARM

ARM-specific 64-bit wide vector of four packed i16.

int16x8_tExperimentalARM

ARM-specific 128-bit wide vector of eight packed i16.

int32x2_tExperimentalARM

ARM-specific 64-bit wide vector of two packed i32.

int32x4_tExperimentalARM

ARM-specific 128-bit wide vector of four packed i32.

int64x1_tExperimentalARM

ARM-specific 64-bit wide vector of one packed i64.

int64x2_tExperimentalARM

ARM-specific 128-bit wide vector of two packed i64.

int8x4_tExperimentalARM

ARM-specific 32-bit wide vector of four packed i8.

int8x8_tExperimentalARM

ARM-specific 64-bit wide vector of eight packed i8.

int8x16_tExperimentalARM

ARM-specific 128-bit wide vector of sixteen packed i8.

int8x8x2_tExperimentalARM

ARM-specific type containing two int8x8_t vectors.

int8x8x3_tExperimentalARM

ARM-specific type containing three int8x8_t vectors.

int8x8x4_tExperimentalARM

ARM-specific type containing four int8x8_t vectors.

poly16x4_tExperimentalARM

ARM-specific 64-bit wide vector of four packed u16.

poly16x8_tExperimentalARM

ARM-specific 128-bit wide vector of eight packed u16.

poly8x8_tExperimentalARM

ARM-specific 64-bit wide polynomial vector of eight packed u8.

poly8x16_tExperimentalARM

ARM-specific 128-bit wide vector of sixteen packed u8.

poly8x8x2_tExperimentalARM

ARM-specific type containing two poly8x8_t vectors.

poly8x8x3_tExperimentalARM

ARM-specific type containing three poly8x8_t vectors.

poly8x8x4_tExperimentalARM

ARM-specific type containing four poly8x8_t vectors.

uint16x2_tExperimentalARM

ARM-specific 32-bit wide vector of two packed u16.

uint16x4_tExperimentalARM

ARM-specific 64-bit wide vector of four packed u16.

uint16x8_tExperimentalARM

ARM-specific 128-bit wide vector of eight packed u16.

uint32x2_tExperimentalARM

ARM-specific 64-bit wide vector of two packed u32.

uint32x4_tExperimentalARM

ARM-specific 128-bit wide vector of four packed u32.

uint64x1_tExperimentalARM

ARM-specific 64-bit wide vector of one packed u64.

uint64x2_tExperimentalARM

ARM-specific 128-bit wide vector of two packed u64.

uint8x4_tExperimentalARM

ARM-specific 32-bit wide vector of four packed u8.

uint8x8_tExperimentalARM

ARM-specific 64-bit wide vector of eight packed u8.

uint8x16_tExperimentalARM

ARM-specific 128-bit wide vector of sixteen packed u8.

uint8x8x2_tExperimentalARM

ARM-specific type containing two uint8x8_t vectors.

uint8x8x3_tExperimentalARM

ARM-specific type containing three uint8x8_t vectors.

uint8x8x4_tExperimentalARM

ARM-specific type containing four uint8x8_t vectors.

Functions

__DMBExperimentalARM and mclass

Data Memory Barrier

__DSBExperimentalARM and mclass

Data Synchronization Barrier

__ISBExperimentalARM and mclass

Instruction Synchronization Barrier

__NOPExperimentalARM and mclass

No Operation

__SEVExperimentalARM and mclass

Send Event

__WFEExperimentalARM and mclass

Wait For Event

__WFIExperimentalARM and mclass

Wait For Interrupt

__breakpointExperimentalARM

Inserts a breakpoint instruction.

__disable_fault_irqExperimentalARM and mclass

Disable FIQ

__disable_irqExperimentalARM and mclass

Disable IRQ Interrupts

__enable_fault_irqExperimentalARM and mclass

Enable FIQ

__enable_irqExperimentalARM and mclass

Enable IRQ Interrupts

__get_APSRExperimentalARM and mclass

Get APSR Register

__get_BASEPRIExperimentalARM and mclass

Get Base Priority

__get_CONTROLExperimentalARM and mclass

Get Control Register

__get_FAULTMASKExperimentalARM and mclass

Get Fault Mask

__get_IPSRExperimentalARM and mclass

Get IPSR Register

__get_MSPExperimentalARM and mclass

Get Main Stack Pointer

__get_PRIMASKExperimentalARM and mclass

Get Priority Mask

__get_PSPExperimentalARM and mclass

Get Process Stack Pointer

__get_xPSRExperimentalARM and mclass

Get xPSR Register

__set_BASEPRIExperimentalARM and mclass

Set Base Priority

__set_BASEPRI_MAXExperimentalARM and mclass

Set Base Priority with condition

__set_CONTROLExperimentalARM and mclass

Set Control Register

__set_FAULTMASKExperimentalARM and mclass

Set Fault Mask

__set_MSPExperimentalARM and mclass

Set Main Stack Pointer

__set_PRIMASKExperimentalARM and mclass

Set Priority Mask

__set_PSPExperimentalARM and mclass

Set Process Stack Pointer

_rev_u16ExperimentalARM

Reverse the order of the bytes.

_rev_u32ExperimentalARM

Reverse the order of the bytes.

qaddExperimentalARM

Signed saturating addition

qadd8ExperimentalARM

Saturating four 8-bit integer additions

qadd16ExperimentalARM

Saturating two 16-bit integer additions

qasxExperimentalARM

Returns the 16-bit signed saturated equivalent of

qsaxExperimentalARM

Returns the 16-bit signed saturated equivalent of

qsubExperimentalARM

Signed saturating subtraction

qsub8ExperimentalARM

Saturating two 8-bit integer subtraction

qsub16ExperimentalARM

Saturating two 16-bit integer subtraction

sadd8ExperimentalARM

Returns the 8-bit signed saturated equivalent of

sadd16ExperimentalARM

Returns the 16-bit signed saturated equivalent of

sasxExperimentalARM

Returns the 16-bit signed equivalent of

selExperimentalARM

Select bytes from each operand according to APSR GE flags

shadd8ExperimentalARM

Signed halving parallel byte-wise addition.

shadd16ExperimentalARM

Signed halving parallel halfword-wise addition.

shsub8ExperimentalARM

Signed halving parallel byte-wise subtraction.

shsub16ExperimentalARM

Signed halving parallel halfword-wise subtraction.

smladExperimentalARM

Dual 16-bit Signed Multiply with Addition of products and 32-bit accumulation.

smlsdExperimentalARM

Dual 16-bit Signed Multiply with Subtraction of products and 32-bit accumulation and overflow detection.

smuadExperimentalARM

Signed Dual Multiply Add.

smuadxExperimentalARM

Signed Dual Multiply Add Reversed.

smusdExperimentalARM

Signed Dual Multiply Subtract.

smusdxExperimentalARM

Signed Dual Multiply Subtract Reversed.

udfExperimentalARM

Generates the trap instruction UDF

usad8ExperimentalARM

Sum of 8-bit absolute differences.

usad8aExperimentalARM

Sum of 8-bit absolute differences and constant.

vadd_f32Experimentalneon and v7 and ARM

Vector add.

vadd_s8Experimentalneon and v7 and ARM

Vector add.

vadd_s16Experimentalneon and v7 and ARM

Vector add.

vadd_s32Experimentalneon and v7 and ARM

Vector add.

vadd_u8Experimentalneon and v7 and ARM

Vector add.

vadd_u16Experimentalneon and v7 and ARM

Vector add.

vadd_u32Experimentalneon and v7 and ARM

Vector add.

vaddl_s8Experimentalneon and v7 and ARM

Vector long add.

vaddl_s16Experimentalneon and v7 and ARM

Vector long add.

vaddl_s32Experimentalneon and v7 and ARM

Vector long add.

vaddl_u8Experimentalneon and v7 and ARM

Vector long add.

vaddl_u16Experimentalneon and v7 and ARM

Vector long add.

vaddl_u32Experimentalneon and v7 and ARM

Vector long add.

vaddq_f32Experimentalneon and v7 and ARM

Vector add.

vaddq_s8Experimentalneon and v7 and ARM

Vector add.

vaddq_s16Experimentalneon and v7 and ARM

Vector add.

vaddq_s32Experimentalneon and v7 and ARM

Vector add.

vaddq_s64Experimentalneon and v7 and ARM

Vector add.

vaddq_u8Experimentalneon and v7 and ARM

Vector add.

vaddq_u16Experimentalneon and v7 and ARM

Vector add.

vaddq_u32Experimentalneon and v7 and ARM

Vector add.

vaddq_u64Experimentalneon and v7 and ARM

Vector add.

vmovl_s8Experimentalneon and v7 and ARM

Vector long move.

vmovl_s16Experimentalneon and v7 and ARM

Vector long move.

vmovl_s32Experimentalneon and v7 and ARM

Vector long move.

vmovl_u8Experimentalneon and v7 and ARM

Vector long move.

vmovl_u16Experimentalneon and v7 and ARM

Vector long move.

vmovl_u32Experimentalneon and v7 and ARM

Vector long move.

vmovn_s16Experimentalneon and v7 and ARM

Vector narrow integer.

vmovn_s32Experimentalneon and v7 and ARM

Vector narrow integer.

vmovn_s64Experimentalneon and v7 and ARM

Vector narrow integer.

vmovn_u16Experimentalneon and v7 and ARM

Vector narrow integer.

vmovn_u32Experimentalneon and v7 and ARM

Vector narrow integer.

vmovn_u64Experimentalneon and v7 and ARM

Vector narrow integer.

vpmax_f32Experimentalneon and v7 and ARM

Folding maximum of adjacent pairs

vpmax_s8Experimentalneon and v7 and ARM

Folding maximum of adjacent pairs

vpmax_s16Experimentalneon and v7 and ARM

Folding maximum of adjacent pairs

vpmax_s32Experimentalneon and v7 and ARM

Folding maximum of adjacent pairs

vpmax_u8Experimentalneon and v7 and ARM

Folding maximum of adjacent pairs

vpmax_u16Experimentalneon and v7 and ARM

Folding maximum of adjacent pairs

vpmax_u32Experimentalneon and v7 and ARM

Folding maximum of adjacent pairs

vpmin_f32Experimentalneon and v7 and ARM

Folding minimum of adjacent pairs

vpmin_s8Experimentalneon and v7 and ARM

Folding minimum of adjacent pairs

vpmin_s16Experimentalneon and v7 and ARM

Folding minimum of adjacent pairs

vpmin_s32Experimentalneon and v7 and ARM

Folding minimum of adjacent pairs

vpmin_u8Experimentalneon and v7 and ARM

Folding minimum of adjacent pairs

vpmin_u16Experimentalneon and v7 and ARM

Folding minimum of adjacent pairs

vpmin_u32Experimentalneon and v7 and ARM

Folding minimum of adjacent pairs

vrsqrte_f32ExperimentalARM and neon

Reciprocal square-root estimate.

vtbl1_p8ExperimentalARM and neon,v7

Table look-up

vtbl1_s8ExperimentalARM and neon,v7

Table look-up

vtbl1_u8ExperimentalARM and neon,v7

Table look-up

vtbl2_p8ExperimentalARM and neon,v7

Table look-up

vtbl2_s8ExperimentalARM and neon,v7

Table look-up

vtbl2_u8ExperimentalARM and neon,v7

Table look-up

vtbl3_p8ExperimentalARM and neon,v7

Table look-up

vtbl3_s8ExperimentalARM and neon,v7

Table look-up

vtbl3_u8ExperimentalARM and neon,v7

Table look-up

vtbl4_p8ExperimentalARM and neon,v7

Table look-up

vtbl4_s8ExperimentalARM and neon,v7

Table look-up

vtbl4_u8ExperimentalARM and neon,v7

Table look-up

vtbx1_p8ExperimentalARM and neon,v7

Extended table look-up

vtbx1_s8ExperimentalARM and neon,v7

Extended table look-up

vtbx1_u8ExperimentalARM and neon,v7

Extended table look-up

vtbx2_p8ExperimentalARM and neon,v7

Extended table look-up

vtbx2_s8ExperimentalARM and neon,v7

Extended table look-up

vtbx2_u8ExperimentalARM and neon,v7

Extended table look-up

vtbx3_p8ExperimentalARM and neon,v7

Extended table look-up

vtbx3_s8ExperimentalARM and neon,v7

Extended table look-up

vtbx3_u8ExperimentalARM and neon,v7

Extended table look-up

vtbx4_p8ExperimentalARM and neon,v7

Extended table look-up

vtbx4_s8ExperimentalARM and neon,v7

Extended table look-up

vtbx4_u8ExperimentalARM and neon,v7

Extended table look-up