Shared Persistent Heap Data Environment Manual  1.1.0
sphtimer.h
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1 /*
2  * Copyright (c) 2010-2014 IBM Corporation.
3  * All rights reserved. This program and the accompanying materials
4  * are made available under the terms of the Eclipse Public License v1.0
5  * which accompanies this distribution, and is available at
6  * http://www.eclipse.org/legal/epl-v10.html
7  *
8  * Contributors:
9  * IBM Corporation, Steven Munroe - initial API and implementation
10  * IBM Corporation, Adhemerval Zanella - bugfixes and documentation
11  */
12 
13 #ifndef __SPH_TIMER_H
14 #define __SPH_TIMER_H
15 
56 #ifdef __cplusplus
57 #define __C__ "C"
58 #else
59 #define __C__
60 #endif
61 
65 typedef unsigned long long int sphtimer_t;
66 
67 #if defined(__powerpc64__)
68 #define __TIME_BASE(__time_v) \
69  do { \
70  sphtimer_t __t; \
71  __asm__ __volatile__ ( \
72  "mfspr %0,268" \
73  : "=r" (__t)); \
74  __time_v = __t; \
75  } while (0)
76 #elif defined(__powerpc__)
77 #define __TIME_BASE(__time_v) \
78  do { \
79  unsigned long __tbu, __tbl, __tmp; \
80  __asm__ volatile ( \
81  "0:\n" \
82  "mftbu %0\n" \
83  "mftbl %1\n" \
84  "mftbu %2\n" \
85  "cmpw %0, %2\n" \
86  "bne- 0b" \
87  : "=r" (__tbu), "=r" (__tbl), "=r" (__tmp) ); \
88  __time_v = (( (sphtimer_t) __tbu << 32) | __tbl); \
89  } while (0)
90 #elif defined(__x86_64__) && defined(__x86_64_INVARIANT_TSC)
91 /* TODO: the accuracy might be susceptible to CPU clock throttling (mainly
92  * due to CPU scaling. So we disable rdtsc unless the user explicitly defines
93  * __x86_64_INVARIANT_TSC.
94  */
95 #define __TIME_BASE(__time_v) \
96  do { \
97  unsigned int __t_hi, __t_lo; \
98  __asm__ __volatile__ ( \
99  "rdtsc" \
100  : "=a" (__t_lo), \
101  "=d" (__t_hi)); \
102  __time_v = ((sphtimer_t) __t_hi << 32) | __t_lo; \
103  } while (0)
104 #elif defined(__i386__) && defined(__x86_INVARIANT_TSC)
105 /* TODO: the accuracy might be susceptible to CPU clock throttling (mainly
106  * due to CPU scaling. So we disable rdtsc unless the user explicitly defines
107  * __x86_INVARIANT_TSC.
108  */
109 #define __TIME_BASE(__time_v) \
110  do { \
111  unsigned int __t; \
112  __asm__ __volatile__ ( \
113  "rdtsc" \
114  : "=A" (__t)); \
115  __time_v = __t; \
116  } while (0)
117 #else
118 #include <time.h>
119 #define __TIME_BASE(__time_v) \
120  do { \
121  struct timespec __ts; \
122  sphtimer_t __t; \
123  clock_gettime (CLOCK_MONOTONIC, &__ts); \
124  __t = ((sphtimer_t)__ts.tv_sec * 1000000000L) \
125  + (sphtimer_t)__ts.tv_nsec; \
126  __time_v = __t; \
127  } while (0)
128 
129 #endif
130 
136 static inline sphtimer_t
138 {
139  sphtimer_t t;
140  __TIME_BASE (t);
141  return t;
142 }
143 
151 
159 extern __C__ sphtimer_t
160 sphgetcpufreq (void);
161 
171 static inline sphtimer_t
173 {
174  sphtimer_t result = sph_cpu_frequency;
175 
176  if (__builtin_expect ((result == 0), 0))
177  {
178  result = sphgetcpufreq ();
179  }
180  return result;
181 }
182 
183 #endif /* __SPH_TIMER_H */
unsigned long long int sphtimer_t
Value from TB/TSC register (64-bits on all platforms).
Definition: sphtimer.h:65
#define __C__
ignore this macro behind the curtain
Definition: sasmsync.h:32
static sphtimer_t sphgettimer(void)
Read and return the Timebase value.
Definition: sphtimer.h:137
sphtimer_t sph_cpu_frequency
Frequency which Timebase is updated by system.
static sphtimer_t sphfastcpufreq(void)
Return the Timebase update frequency (fast version).
Definition: sphtimer.h:172
__C__ sphtimer_t sphgetcpufreq(void)
Return the Timebase update frequency.