32 #define BITS_INV_ACC 5 // 4 or 5 for IEEE
33 #define SHIFT_INV_ROW (16 - BITS_INV_ACC)
34 #define SHIFT_INV_COL (1 + BITS_INV_ACC)
44 #define TAB_i_04 (32+0)
45 #define TAB_i_17 (32+64)
46 #define TAB_i_26 (32+128)
47 #define TAB_i_35 (32+192)
49 #define TG_1_16 (32+256+0)
50 #define TG_2_16 (32+256+16)
51 #define TG_3_16 (32+256+32)
52 #define COS_4_16 (32+256+48)
54 #define CLIPMAX (32+256+64+0)
58 0x3ff, 1, 0x3ff, 1, 0x3ff, 1, 0x3ff, 1,
60 0x3ff, 0, 0x3ff, 0, 0x3ff, 0, 0x3ff, 0,
62 16384, 21407, -16384, -21407, 22725, 19266, -22725, -12873,
63 8867, 16384, 8867, 16384, 4520, 12873, -4520, 19266,
64 16384, -8867, 16384, -8867, 12873, -22725, 19266, -22725,
65 21407, -16384, -21407, 16384, 19266, 4520, -12873, 4520,
67 22725, 29692, -22725, -29692, 31521, 26722, -31521, -17855,
68 12299, 22725, 12299, 22725, 6270, 17855, -6270, 26722,
69 22725, -12299, 22725, -12299, 17855, -31521, 26722, -31521,
70 29692, -22725, -29692, 22725, 26722, 6270, -17855, 6270,
72 21407, 27969, -21407, -27969, 29692, 25172, -29692, -16819,
73 11585, 21407, 11585, 21407, 5906, 16819, -5906, 25172,
74 21407, -11585, 21407, -11585, 16819, -29692, 25172, -29692,
75 27969, -21407, -27969, 21407, 25172, 5906, -16819, 5906,
77 19266, 25172, -19266, -25172, 26722, 22654, -26722, -15137,
78 10426, 19266, 10426, 19266, 5315, 15137, -5315, 22654,
79 19266, -10426, 19266, -10426, 15137, -26722, 22654, -26722,
80 25172, -19266, -25172, 19266, 22654, 5315, -15137, 5315,
87 255, 255, 255, 255, 255, 255, 255, 255
91 #define DCT_8_INV_ROW1(blk, rowoff, taboff, rnd, outreg) { \
92 lq(blk, rowoff, $16); \
94 lq($24, 0+taboff, $17); \
96 lq($24, 16+taboff, $18); \
98 lq($24, 32+taboff, $19); \
99 phmadh($17, $16, $17); \
100 lq($24, 48+taboff, $20); \
101 phmadh($18, $2, $18); \
102 phmadh($19, $16, $19); \
103 phmadh($20, $2, $20); \
104 paddw($17, $18, $17); \
105 paddw($19, $20, $19); \
106 pcpyld($19, $17, $18); \
107 pcpyud($17, $19, $20); \
108 paddw($18, rnd, $18); \
109 paddw($18, $20, $17); \
110 psubw($18, $20, $20); \
111 psraw($17, SHIFT_INV_ROW, $17); \
112 psraw($20, SHIFT_INV_ROW, $20); \
113 ppach($20, $17, outreg); \
116 pcpyud($2, $2, $2); \
117 pcpyld($2, outreg, outreg); \
121 #define DCT_8_INV_COL8() \
123 lq($24, TG_3_16, $2); \
125 pmulth($11, $2, $17); \
126 psraw($17, 15, $17); \
129 pinteh($3, $17, $17); \
130 psubh($17, $13, $17); \
132 pmulth($13, $2, $18); \
133 psraw($18, 15, $18); \
136 pinteh($3, $18, $18); \
137 paddh($18, $11, $18); \
139 lq($24, TG_1_16, $2); \
141 pmulth($15, $2, $19); \
142 psraw($19, 15, $19); \
145 pinteh($3, $19, $19); \
146 paddh($19, $9, $19); \
148 pmulth($9, $2, $20); \
149 psraw($20, 15, $20); \
152 pinteh($3, $20, $20); \
153 psubh($20, $15, $20); \
155 psubh($19, $18, $3); \
156 paddh($20, $17, $16); \
157 psubh($20, $17, $23); \
158 paddh($19, $18, $20); \
160 lq($24, COS_4_16, $2); \
162 paddh($3, $16, $21); \
163 psubh($3, $16, $22); \
165 pmulth($21, $2, $21); \
166 psraw($21, 15, $21); \
169 pinteh($3, $21, $21); \
171 pmulth($22, $2, $22); \
172 psraw($22, 15, $22); \
175 pinteh($3, $22, $22); \
177 lq($24, TG_2_16, $2); \
179 pmulth($10, $2, $17); \
180 psraw($17, 15, $17); \
183 pinteh($3, $17, $17); \
184 psubh($17, $14, $17); \
186 pmulth($14, $2, $18); \
187 psraw($18, 15, $18); \
190 pinteh($3, $18, $18); \
191 paddh($18, $10, $18); \
193 paddh($8, $12, $2); \
194 psubh($8, $12, $3); \
196 paddh($2, $18, $16); \
197 psubh($2, $18, $19); \
198 psubh($3, $17, $18); \
202 #define DCT_8_INV_COL8_STORE(blk) \
204 paddh($16, $20, $2); \
205 psubh($16, $20, $16); \
206 psrah($2, SHIFT_INV_COL, $2); \
207 psrah($16, SHIFT_INV_COL, $16); \
211 paddh($17, $21, $3); \
212 psubh($17, $21, $17); \
213 psrah($3, SHIFT_INV_COL, $3); \
214 psrah($17, SHIFT_INV_COL, $17); \
218 paddh($18, $22, $2); \
219 psubh($18, $22, $18); \
220 psrah($2, SHIFT_INV_COL, $2); \
221 psrah($18, SHIFT_INV_COL, $18); \
225 paddh($19, $23, $3); \
226 psubh($19, $23, $19); \
227 psrah($3, SHIFT_INV_COL, $3); \
228 psrah($19, SHIFT_INV_COL, $19); \
234 #define DCT_8_INV_COL8_PMS() \
235 paddh($16, $20, $2); \
236 psubh($16, $20, $20); \
237 psrah($2, SHIFT_INV_COL, $16); \
238 psrah($20, SHIFT_INV_COL, $20); \
240 paddh($17, $21, $3); \
241 psubh($17, $21, $21); \
242 psrah($3, SHIFT_INV_COL, $17); \
243 psrah($21, SHIFT_INV_COL, $21); \
245 paddh($18, $22, $2); \
246 psubh($18, $22, $22); \
247 psrah($2, SHIFT_INV_COL, $18); \
248 psrah($22, SHIFT_INV_COL, $22); \
250 paddh($19, $23, $3); \
251 psubh($19, $23, $23); \
252 psrah($3, SHIFT_INV_COL, $19); \
253 psrah($23, SHIFT_INV_COL, $23);
256 pminh(rs, $11, $2); \
260 __asm__ volatile ("add $4, $5, $4");
262 #define DCT_8_INV_COL8_PUT() \
274 pextlb($0, $2, $2); \
276 pminh($2, $11, $2); \
280 __asm__ volatile ("add $4, $5, $4");
283 #define DCT_8_INV_COL8_ADD() \
297 __asm__
volatile(
"la $24, %0"::
"m"(consttable[0]));
312 __asm__
volatile(
" ":::
"$16",
"$17",
"$18",
"$19",
"$20",
"$21",
"$22",
"$23");
319 __asm__
volatile(
"la $24, %0"::
"m"(consttable[0]));
336 __asm__
volatile(
" ":::
"$16",
"$17",
"$18",
"$19",
"$20",
"$21",
"$22",
"$23");
343 __asm__
volatile(
"la $24, %0"::
"m"(consttable[0]));
360 __asm__
volatile(
" ":::
"$16",
"$17",
"$18",
"$19",
"$20",
"$21",
"$22",
"$23");